feat(driver_gptimer): esp32h21 add basic gptimer support

Author: wanckl

components/driver/test_apps/legacy_timer_driver/README.md

@@ -1,2 +1,2 @@
-| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- |

components/esp_driver_gptimer/test_apps/gptimer/README.md

@@ -1,2 +1,2 @@
-| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- |

components/esp_driver_gptimer/test_apps/gptimer/main/CMakeLists.txt

@@ -15,6 +15,8 @@ endif()
 
 # In order for the cases defined by `TEST_CASE` to be linked into the final elf,
 # the component can be registered as WHOLE_ARCHIVE
-idf_component_register(SRCS ${srcs}
-                       PRIV_REQUIRES unity esp_driver_gptimer esp_driver_gpio
-                       WHOLE_ARCHIVE)
+idf_component_register(
+    SRCS ${srcs}
+    PRIV_REQUIRES unity esp_driver_gptimer esp_driver_gpio
+    WHOLE_ARCHIVE
+)

components/esp_driver_gptimer/test_apps/gptimer/main/test_gptimer.c

@@ -103,7 +103,7 @@ TEST_CASE("gptimer_wallclock_with_various_clock_sources", "[gptimer]")
             printf("get raw count of gptimer %d: %llu\r\n", i, value);
             // convert the raw count to us
             value = value * 1000000 / timer_resolution_hz[i];
-            TEST_ASSERT_UINT_WITHIN(200, 20000, value);
+            TEST_ASSERT_UINT_WITHIN(400, 20000, value);     //200 more threshold for cpu on stop process
         }
         printf("restart timers\r\n");
         for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
@@ -121,7 +121,7 @@ TEST_CASE("gptimer_wallclock_with_various_clock_sources", "[gptimer]")
             printf("get raw count of gptimer %d: %llu\r\n", i, value);
             // convert the raw count to us
             value = value * 1000000 / timer_resolution_hz[i];
-            TEST_ASSERT_UINT_WITHIN(400, 40000, value);
+            TEST_ASSERT_UINT_WITHIN(600, 40000, value);     //same 200 for cpu time
         }
         printf("disable timers\r\n");
         for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {

components/esp_hw_support/port/esp32h21/esp_clk_tree.c

@@ -24,8 +24,15 @@ uint32_t *freq_value)
     ESP_RETURN_ON_FALSE(precision < ESP_CLK_TREE_SRC_FREQ_PRECISION_INVALID, ESP_ERR_INVALID_ARG, TAG, "unknown precision");
     ESP_RETURN_ON_FALSE(freq_value, ESP_ERR_INVALID_ARG, TAG, "null pointer");
 
+#if !SOC_CLK_TREE_SUPPORTED
+    // Have only XTAL 32M before clock tree supported
+    assert(clk_src == SOC_MOD_CLK_XTAL);
+#endif
     uint32_t clk_src_freq = 0;
     switch (clk_src) {
+    case SOC_MOD_CLK_XTAL:
+        clk_src_freq = SOC_XTAL_FREQ_32M * MHZ;
+        break;
     case SOC_MOD_CLK_PLL_F48M:
         clk_src_freq = CLK_LL_PLL_48M_FREQ_MHZ * MHZ;
         break;
@@ -39,8 +46,7 @@ uint32_t *freq_value)
         break;
     }
 
-    ESP_RETURN_ON_FALSE(clk_src_freq, ESP_FAIL, TAG,
-                        "freq shouldn't be 0, calibration failed");
+    ESP_RETURN_ON_FALSE(clk_src_freq, ESP_FAIL, TAG, "freq shouldn't be 0, calibration failed");
     *freq_value = clk_src_freq;
     return ESP_OK;
 }

components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/CMakeLists.txt

@@ -21,7 +21,7 @@ if(CONFIG_SOC_ETM_SUPPORTED)
     list(APPEND srcs "test_etm_core.c")
 endif()
 
-if(CONFIG_SOC_GPTIMER_SUPPORTED)
+if(CONFIG_SOC_GPTIMER_SUPPORTED AND CONFIG_SOC_GPSPI_SUPPORTED)
     list(APPEND srcs "test_intr_alloc.c")
 endif()
 

components/esp_system/int_wdt.c

@@ -53,7 +53,7 @@
 #endif // SOC_TIMER_GROUPS > 1
 
 #if CONFIG_ESP_INT_WDT
-#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_TIMER_SUPPORT_SLEEP_RETENTION
+#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_MWDT_SUPPORT_SLEEP_RETENTION
 static const char* TAG = "int_wdt";
 static esp_err_t sleep_int_wdt_retention_init(void *arg)
 {
@@ -160,7 +160,7 @@ void esp_int_wdt_init(void)
     wdt_hal_enable(&iwdt_context);
     wdt_hal_write_protect_enable(&iwdt_context);
 
-#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_TIMER_SUPPORT_SLEEP_RETENTION
+#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_MWDT_SUPPORT_SLEEP_RETENTION
     esp_int_wdt_retention_enable(IWDT_TIMER_GROUP);
 #endif
 

components/esp_system/task_wdt/task_wdt_impl_timergroup.c

@@ -21,7 +21,7 @@
 #include "esp_private/periph_ctrl.h"
 #include "esp_private/esp_task_wdt_impl.h"
 
-#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_TIMER_SUPPORT_SLEEP_RETENTION
+#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_MWDT_SUPPORT_SLEEP_RETENTION
 #include "esp_private/sleep_retention.h"
 #endif
 
@@ -46,7 +46,7 @@ typedef struct {
  * init function. */
 static twdt_ctx_hard_t init_context;
 
-#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_TIMER_SUPPORT_SLEEP_RETENTION
+#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_MWDT_SUPPORT_SLEEP_RETENTION
 static const char* TAG = "task_wdt";
 static esp_err_t sleep_task_wdt_retention_init(void *arg)
 {
@@ -124,7 +124,7 @@ esp_err_t esp_task_wdt_impl_timer_allocate(const esp_task_wdt_config_t *config,
         /* Return the implementation context to the caller */
         *obj = (twdt_ctx_t) ctx;
 
-#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_TIMER_SUPPORT_SLEEP_RETENTION
+#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_MWDT_SUPPORT_SLEEP_RETENTION
         esp_task_wdt_retention_enable(TWDT_TIMER_GROUP);
 #endif
     }
@@ -171,7 +171,7 @@ void esp_task_wdt_impl_timer_free(twdt_ctx_t obj)
         /* Deregister interrupt */
         ESP_ERROR_CHECK(esp_intr_free(ctx->intr_handle));
 
-#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_TIMER_SUPPORT_SLEEP_RETENTION
+#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_MWDT_SUPPORT_SLEEP_RETENTION
         ESP_ERROR_CHECK(esp_task_wdt_retention_disable(TWDT_TIMER_GROUP));
 #endif
     }

components/esp_system/test_apps/esp_system_unity_tests/main/test_task_wdt.c

@@ -16,7 +16,7 @@
 #include "soc/rtc.h"
 #include "soc/soc_caps.h"
 
-#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_TIMER_SUPPORT_SLEEP_RETENTION
+#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_MWDT_SUPPORT_SLEEP_RETENTION
 #include "esp_sleep.h"
 #include "esp_private/esp_sleep_internal.h"
 #include "esp_private/sleep_cpu.h"
@@ -49,7 +49,7 @@ TEST_CASE("Task WDT task timeout", "[task_wdt]")
     TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_deinit());
 }
 
-#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_TIMER_SUPPORT_SLEEP_RETENTION
+#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_MWDT_SUPPORT_SLEEP_RETENTION
 TEST_CASE("Task WDT task timeout after peripheral powerdown lightsleep", "[task_wdt]")
 {
     timeout_flag = false;

components/hal/esp32h21/include/hal/mwdt_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -276,31 +276,23 @@ FORCE_INLINE_ATTR void mwdt_ll_set_intr_enable(timg_dev_t *hw, bool enable)
  * @param hw Beginning address of the peripheral registers.
  * @param clk_src Clock source
  */
-
 FORCE_INLINE_ATTR void mwdt_ll_set_clock_source(timg_dev_t *hw, mwdt_clock_source_t clk_src)
 {
-    uint8_t clk_id = 0;
+    uint8_t group_id = (hw == &TIMERG0) ? 0 : 1;
     switch (clk_src) {
     case MWDT_CLK_SRC_XTAL:
-        clk_id = 0;
+        PCR.timergroup[group_id].timergroup_wdt_clk_conf.tg_wdt_clk_sel = 0;
         break;
     case MWDT_CLK_SRC_RC_FAST:
-        clk_id = 1;
+        PCR.timergroup[group_id].timergroup_wdt_clk_conf.tg_wdt_clk_sel = 1;
         break;
     case MWDT_CLK_SRC_PLL_F48M:
-        clk_id = 2;
+        PCR.timergroup[group_id].timergroup_wdt_clk_conf.tg_wdt_clk_sel = 2;
         break;
     default:
         HAL_ASSERT(false);
         break;
     }
-
-
-    if (hw == &TIMERG0) {
-        PCR.timergroup0_wdt_clk_conf.tg0_wdt_clk_sel = clk_id;
-    } else {
-        PCR.timergroup1_wdt_clk_conf.tg1_wdt_clk_sel = clk_id;
-    }
 }
 
 /**
@@ -312,11 +304,8 @@ FORCE_INLINE_ATTR void mwdt_ll_set_clock_source(timg_dev_t *hw, mwdt_clock_sourc
 __attribute__((always_inline))
 static inline void mwdt_ll_enable_clock(timg_dev_t *hw, bool en)
 {
-    if (hw == &TIMERG0) {
-        PCR.timergroup0_wdt_clk_conf.tg0_wdt_clk_en = en;
-    } else {
-        PCR.timergroup1_wdt_clk_conf.tg1_wdt_clk_en = en;
-    }
+    uint8_t group_id = (hw == &TIMERG0) ? 0 : 1;
+    PCR.timergroup[group_id].timergroup_wdt_clk_conf.tg_wdt_clk_en = en;
 }
 
 #ifdef __cplusplus