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| 1 | +/** |
| 2 | + * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | +#pragma once |
| 7 | + |
| 8 | +#include <stdint.h> |
| 9 | +#ifdef __cplusplus |
| 10 | +extern "C" { |
| 11 | +#endif |
| 12 | + |
| 13 | +/** Group: configure_register */ |
| 14 | +/* Type of test_conf register*/ |
| 15 | +typedef union { |
| 16 | + struct { |
| 17 | + /* clk_en : R/W; bitpos: [0]; default: 0;*/ |
| 18 | + uint32_t clk_en: 1; |
| 19 | + uint32_t reserved_1: 31; |
| 20 | + }; |
| 21 | + uint32_t val; |
| 22 | +} modem_lpcon_test_conf_reg_t; |
| 23 | + |
| 24 | +/* Type of lp_timer_conf register*/ |
| 25 | +typedef union { |
| 26 | + struct { |
| 27 | + /* clk_lp_timer_sel_osc_slow : R/W; bitpos: [0]; default: 0;*/ |
| 28 | + uint32_t clk_lp_timer_sel_osc_slow: 1; |
| 29 | + /* clk_lp_timer_sel_osc_fast : R/W; bitpos: [1]; default: 0;*/ |
| 30 | + uint32_t clk_lp_timer_sel_osc_fast: 1; |
| 31 | + /* clk_lp_timer_sel_xtal : R/W; bitpos: [2]; default: 0;*/ |
| 32 | + uint32_t clk_lp_timer_sel_xtal: 1; |
| 33 | + /* clk_lp_timer_sel_xtal32k : R/W; bitpos: [3]; default: 0;*/ |
| 34 | + uint32_t clk_lp_timer_sel_xtal32k: 1; |
| 35 | + /* clk_lp_timer_div_num : R/W; bitpos: [15:4]; default: 0;*/ |
| 36 | + uint32_t clk_lp_timer_div_num: 12; |
| 37 | + uint32_t reserved_16: 16; |
| 38 | + }; |
| 39 | + uint32_t val; |
| 40 | +} modem_lpcon_lp_timer_conf_reg_t; |
| 41 | + |
| 42 | +/* Type of coex_lp_clk_conf register*/ |
| 43 | +typedef union { |
| 44 | + struct { |
| 45 | + /* clk_coex_lp_sel_osc_slow : R/W; bitpos: [0]; default: 0;*/ |
| 46 | + uint32_t clk_coex_lp_sel_osc_slow: 1; |
| 47 | + /* clk_coex_lp_sel_osc_fast : R/W; bitpos: [1]; default: 0;*/ |
| 48 | + uint32_t clk_coex_lp_sel_osc_fast: 1; |
| 49 | + /* clk_coex_lp_sel_xtal : R/W; bitpos: [2]; default: 0;*/ |
| 50 | + uint32_t clk_coex_lp_sel_xtal: 1; |
| 51 | + /* clk_coex_lp_sel_xtal32k : R/W; bitpos: [3]; default: 0;*/ |
| 52 | + uint32_t clk_coex_lp_sel_xtal32k: 1; |
| 53 | + /* clk_coex_lp_div_num : R/W; bitpos: [15:4]; default: 0;*/ |
| 54 | + uint32_t clk_coex_lp_div_num: 12; |
| 55 | + uint32_t reserved_16: 16; |
| 56 | + }; |
| 57 | + uint32_t val; |
| 58 | +} modem_lpcon_coex_lp_clk_conf_reg_t; |
| 59 | + |
| 60 | +/* Type of wifi_lp_clk_conf register*/ |
| 61 | +typedef union { |
| 62 | + struct { |
| 63 | + /* clk_wifipwr_lp_sel_osc_slow : R/W; bitpos: [0]; default: 0;*/ |
| 64 | + uint32_t clk_wifipwr_lp_sel_osc_slow: 1; |
| 65 | + /* clk_wifipwr_lp_sel_osc_fast : R/W; bitpos: [1]; default: 0;*/ |
| 66 | + uint32_t clk_wifipwr_lp_sel_osc_fast: 1; |
| 67 | + /* clk_wifipwr_lp_sel_xtal : R/W; bitpos: [2]; default: 0;*/ |
| 68 | + uint32_t clk_wifipwr_lp_sel_xtal: 1; |
| 69 | + /* clk_wifipwr_lp_sel_xtal32k : R/W; bitpos: [3]; default: 0;*/ |
| 70 | + uint32_t clk_wifipwr_lp_sel_xtal32k: 1; |
| 71 | + /* clk_wifipwr_lp_div_num : R/W; bitpos: [15:4]; default: 0;*/ |
| 72 | + uint32_t clk_wifipwr_lp_div_num: 12; |
| 73 | + uint32_t reserved_16: 16; |
| 74 | + }; |
| 75 | + uint32_t val; |
| 76 | +} modem_lpcon_wifi_lp_clk_conf_reg_t; |
| 77 | + |
| 78 | +/* Type of modem_src_clk_conf register*/ |
| 79 | +typedef union { |
| 80 | + struct { |
| 81 | + /* clk_modem_aon_force : R/W; bitpos: [1:0]; default: 0;*/ |
| 82 | + uint32_t clk_modem_aon_force: 2; |
| 83 | + /* modem_pwr_32k_fo : R/W; bitpos: [2]; default: 0;*/ |
| 84 | + uint32_t modem_pwr_32k_fo: 1; |
| 85 | + /* modem_pwr_fosc_fo : R/W; bitpos: [3]; default: 0;*/ |
| 86 | + uint32_t modem_pwr_fosc_fo: 1; |
| 87 | + /* modem_pwr_sosc_fo : R/W; bitpos: [4]; default: 0;*/ |
| 88 | + uint32_t modem_pwr_sosc_fo: 1; |
| 89 | + /* modem_pwr_xtal_fo : R/W; bitpos: [5]; default: 0;*/ |
| 90 | + uint32_t modem_pwr_xtal_fo: 1; |
| 91 | + uint32_t reserved_6: 26; |
| 92 | + }; |
| 93 | + uint32_t val; |
| 94 | +} modem_lpcon_modem_src_clk_conf_reg_t; |
| 95 | + |
| 96 | +/* Type of modem_32k_clk_conf register*/ |
| 97 | +typedef union { |
| 98 | + struct { |
| 99 | + /* clk_modem_32k_sel : R/W; bitpos: [1:0]; default: 0;*/ |
| 100 | + uint32_t clk_modem_32k_sel: 2; |
| 101 | + uint32_t reserved_2: 30; |
| 102 | + }; |
| 103 | + uint32_t val; |
| 104 | +} modem_lpcon_modem_32k_clk_conf_reg_t; |
| 105 | + |
| 106 | +/* Type of clk_conf register*/ |
| 107 | +typedef union { |
| 108 | + struct { |
| 109 | + /* clk_wifipwr_en : R/W; bitpos: [0]; default: 0;*/ |
| 110 | + uint32_t clk_wifipwr_en: 1; |
| 111 | + /* clk_coex_en : R/W; bitpos: [1]; default: 0;*/ |
| 112 | + uint32_t clk_coex_en: 1; |
| 113 | + /* clk_i2c_mst_en : R/W; bitpos: [2]; default: 0;*/ |
| 114 | + uint32_t clk_i2c_mst_en: 1; |
| 115 | + /* clk_lp_timer_en : R/W; bitpos: [3]; default: 0;*/ |
| 116 | + uint32_t clk_lp_timer_en: 1; |
| 117 | + /* clk_ana_xtal_en : R/W; bitpos: [4]; default: 1;*/ |
| 118 | + uint32_t clk_ana_xtal_en: 1; |
| 119 | + uint32_t reserved_5: 27; |
| 120 | + }; |
| 121 | + uint32_t val; |
| 122 | +} modem_lpcon_clk_conf_reg_t; |
| 123 | + |
| 124 | +/* Type of clk_conf_force_on register*/ |
| 125 | +typedef union { |
| 126 | + struct { |
| 127 | + /* clk_wifipwr_fo : R/W; bitpos: [0]; default: 0;*/ |
| 128 | + uint32_t clk_wifipwr_fo: 1; |
| 129 | + /* clk_coex_fo : R/W; bitpos: [1]; default: 0;*/ |
| 130 | + uint32_t clk_coex_fo: 1; |
| 131 | + /* clk_i2c_mst_fo : R/W; bitpos: [2]; default: 0;*/ |
| 132 | + uint32_t clk_i2c_mst_fo: 1; |
| 133 | + /* clk_lp_timer_fo : R/W; bitpos: [3]; default: 0;*/ |
| 134 | + uint32_t clk_lp_timer_fo: 1; |
| 135 | + /* clk_agc_mem_fo : R/W; bitpos: [4]; default: 0;*/ |
| 136 | + uint32_t clk_agc_mem_fo: 1; |
| 137 | + /* clk_pbus_mem_fo : R/W; bitpos: [5]; default: 0;*/ |
| 138 | + uint32_t clk_pbus_mem_fo: 1; |
| 139 | + /* clk_chan_freq_mem_fo : R/W; bitpos: [6]; default: 0;*/ |
| 140 | + uint32_t clk_chan_freq_mem_fo: 1; |
| 141 | + /* clk_agc_dcmem_fo : R/W; bitpos: [7]; default: 0;*/ |
| 142 | + uint32_t clk_agc_dcmem_fo: 1; |
| 143 | + /* clk_bcmem_fo : R/W; bitpos: [8]; default: 0;*/ |
| 144 | + uint32_t clk_bcmem_fo: 1; |
| 145 | + /* clk_i2c_mst_mem_fo : R/W; bitpos: [9]; default: 0;*/ |
| 146 | + uint32_t clk_i2c_mst_mem_fo: 1; |
| 147 | + uint32_t reserved_10: 22; |
| 148 | + }; |
| 149 | + uint32_t val; |
| 150 | +} modem_lpcon_clk_conf_force_on_reg_t; |
| 151 | + |
| 152 | +/* Type of clk_conf_power_st register*/ |
| 153 | +typedef union { |
| 154 | + struct { |
| 155 | + uint32_t reserved_0: 16; |
| 156 | + /* clk_wifipwr_st_map : R/W; bitpos: [19:16]; default: 0;*/ |
| 157 | + uint32_t clk_wifipwr_st_map: 4; |
| 158 | + /* clk_coex_st_map : R/W; bitpos: [23:20]; default: 0;*/ |
| 159 | + uint32_t clk_coex_st_map: 4; |
| 160 | + /* clk_i2c_mst_st_map : R/W; bitpos: [27:24]; default: 0;*/ |
| 161 | + uint32_t clk_i2c_mst_st_map: 4; |
| 162 | + /* clk_lp_apb_st_map : R/W; bitpos: [31:28]; default: 0;*/ |
| 163 | + uint32_t clk_lp_apb_st_map: 4; |
| 164 | + }; |
| 165 | + uint32_t val; |
| 166 | +} modem_lpcon_clk_conf_power_st_reg_t; |
| 167 | + |
| 168 | +/* Type of rst_conf register*/ |
| 169 | +typedef union { |
| 170 | + struct { |
| 171 | + /* rst_wifipwr : WO; bitpos: [0]; default: 0;*/ |
| 172 | + uint32_t rst_wifipwr: 1; |
| 173 | + /* rst_coex : WO; bitpos: [1]; default: 0;*/ |
| 174 | + uint32_t rst_coex: 1; |
| 175 | + /* rst_i2c_mst : WO; bitpos: [2]; default: 0;*/ |
| 176 | + uint32_t rst_i2c_mst: 1; |
| 177 | + /* rst_lp_timer : WO; bitpos: [3]; default: 0;*/ |
| 178 | + uint32_t rst_lp_timer: 1; |
| 179 | + /* rst_dcmem : WO; bitpos: [4]; default: 0;*/ |
| 180 | + uint32_t rst_dcmem: 1; |
| 181 | + /* rst_modem_power_ctrl : WO; bitpos: [5]; default: 0;*/ |
| 182 | + uint32_t rst_modem_power_ctrl: 1; |
| 183 | + uint32_t reserved_6: 26; |
| 184 | + }; |
| 185 | + uint32_t val; |
| 186 | +} modem_lpcon_rst_conf_reg_t; |
| 187 | + |
| 188 | +/* Type of tick_conf register*/ |
| 189 | +typedef union { |
| 190 | + struct { |
| 191 | + /* modem_pwr_tick_target : R/W; bitpos: [5:0]; default: 39;*/ |
| 192 | + uint32_t modem_pwr_tick_target: 6; |
| 193 | + uint32_t reserved_6: 26; |
| 194 | + }; |
| 195 | + uint32_t val; |
| 196 | +} modem_lpcon_tick_conf_reg_t; |
| 197 | + |
| 198 | +/* Type of mem_conf register*/ |
| 199 | +typedef union { |
| 200 | + struct { |
| 201 | + /* dc_mem_mode : R/W; bitpos: [2:0]; default: 0;*/ |
| 202 | + uint32_t dc_mem_mode: 3; |
| 203 | + /* dc_mem_force : R/W; bitpos: [3]; default: 1;*/ |
| 204 | + uint32_t dc_mem_force: 1; |
| 205 | + /* agc_mem_mode : R/W; bitpos: [6:4]; default: 0;*/ |
| 206 | + uint32_t agc_mem_mode: 3; |
| 207 | + /* agc_mem_force : R/W; bitpos: [7]; default: 1;*/ |
| 208 | + uint32_t agc_mem_force: 1; |
| 209 | + /* pbus_mem_mode : R/W; bitpos: [10:8]; default: 0;*/ |
| 210 | + uint32_t pbus_mem_mode: 3; |
| 211 | + /* pbus_mem_force : R/W; bitpos: [11]; default: 1;*/ |
| 212 | + uint32_t pbus_mem_force: 1; |
| 213 | + /* bc_mem_mode : R/W; bitpos: [14:12]; default: 0;*/ |
| 214 | + uint32_t bc_mem_mode: 3; |
| 215 | + /* bc_mem_force : R/W; bitpos: [15]; default: 1;*/ |
| 216 | + uint32_t bc_mem_force: 1; |
| 217 | + /* i2c_mst_mem_mode : R/W; bitpos: [18:16]; default: 0;*/ |
| 218 | + uint32_t i2c_mst_mem_mode: 3; |
| 219 | + /* i2c_mst_mem_force : R/W; bitpos: [19]; default: 1;*/ |
| 220 | + uint32_t i2c_mst_mem_force: 1; |
| 221 | + /* chan_freq_mem_mode : R/W; bitpos: [22:20]; default: 0;*/ |
| 222 | + uint32_t chan_freq_mem_mode: 3; |
| 223 | + /* chan_freq_mem_force : R/W; bitpos: [23]; default: 1;*/ |
| 224 | + uint32_t chan_freq_mem_force: 1; |
| 225 | + uint32_t reserved_24: 8; |
| 226 | + }; |
| 227 | + uint32_t val; |
| 228 | +} modem_lpcon_mem_conf_reg_t; |
| 229 | + |
| 230 | +/* Type of mem_rf1_aux_ctrl register*/ |
| 231 | +typedef union { |
| 232 | + struct { |
| 233 | + /* modem_pwr_rf1_aux_ctrl : R/W; bitpos: [31:0]; default: 10320;*/ |
| 234 | + uint32_t modem_pwr_rf1_aux_ctrl: 32; |
| 235 | + }; |
| 236 | + uint32_t val; |
| 237 | +} modem_lpcon_mem_rf1_aux_ctrl_reg_t; |
| 238 | + |
| 239 | +/* Type of mem_rf2_aux_ctrl register*/ |
| 240 | +typedef union { |
| 241 | + struct { |
| 242 | + /* modem_pwr_rf2_aux_ctrl : R/W; bitpos: [31:0]; default: 0;*/ |
| 243 | + uint32_t modem_pwr_rf2_aux_ctrl: 32; |
| 244 | + }; |
| 245 | + uint32_t val; |
| 246 | +} modem_lpcon_mem_rf2_aux_ctrl_reg_t; |
| 247 | + |
| 248 | +/* Type of apb_mem_sel register*/ |
| 249 | +typedef union { |
| 250 | + struct { |
| 251 | + /* chan_freq_mem_en : R/W; bitpos: [0]; default: 0;*/ |
| 252 | + uint32_t chan_freq_mem_en: 1; |
| 253 | + /* pbus_mem_en : R/W; bitpos: [1]; default: 0;*/ |
| 254 | + uint32_t pbus_mem_en: 1; |
| 255 | + /* agc_mem_en : R/W; bitpos: [2]; default: 0;*/ |
| 256 | + uint32_t agc_mem_en: 1; |
| 257 | + /* pwr_mem_base : R/W; bitpos: [18:3]; default: 0;*/ |
| 258 | + uint32_t pwr_mem_base: 16; |
| 259 | + uint32_t reserved_19: 13; |
| 260 | + }; |
| 261 | + uint32_t val; |
| 262 | +} modem_lpcon_apb_mem_sel_reg_t; |
| 263 | + |
| 264 | +/* Type of dcmem_valid_0 register*/ |
| 265 | +typedef union { |
| 266 | + struct { |
| 267 | + /* dcmem_valid_0 : RO; bitpos: [31:0]; default: 0;*/ |
| 268 | + uint32_t dcmem_valid_0: 32; |
| 269 | + }; |
| 270 | + uint32_t val; |
| 271 | +} modem_lpcon_dcmem_valid_0_reg_t; |
| 272 | + |
| 273 | +/* Type of dcmem_valid_1 register*/ |
| 274 | +typedef union { |
| 275 | + struct { |
| 276 | + /* dcmem_valid_1 : RO; bitpos: [31:0]; default: 0;*/ |
| 277 | + uint32_t dcmem_valid_1: 32; |
| 278 | + }; |
| 279 | + uint32_t val; |
| 280 | +} modem_lpcon_dcmem_valid_1_reg_t; |
| 281 | + |
| 282 | +/* Type of dcmem_valid_2 register*/ |
| 283 | +typedef union { |
| 284 | + struct { |
| 285 | + /* dcmem_valid_2 : RO; bitpos: [31:0]; default: 0;*/ |
| 286 | + uint32_t dcmem_valid_2: 32; |
| 287 | + }; |
| 288 | + uint32_t val; |
| 289 | +} modem_lpcon_dcmem_valid_2_reg_t; |
| 290 | + |
| 291 | +/* Type of dcmem_valid_3 register*/ |
| 292 | +typedef union { |
| 293 | + struct { |
| 294 | + /* dcmem_valid_3 : RO; bitpos: [31:0]; default: 0;*/ |
| 295 | + uint32_t dcmem_valid_3: 32; |
| 296 | + }; |
| 297 | + uint32_t val; |
| 298 | +} modem_lpcon_dcmem_valid_3_reg_t; |
| 299 | + |
| 300 | +/* Type of date register*/ |
| 301 | +typedef union { |
| 302 | + struct { |
| 303 | + /* date : R/W; bitpos: [27:0]; default: 37823024;*/ |
| 304 | + uint32_t date: 28; |
| 305 | + uint32_t reserved_28: 4; |
| 306 | + }; |
| 307 | + uint32_t val; |
| 308 | +} modem_lpcon_date_reg_t; |
| 309 | + |
| 310 | +typedef struct { |
| 311 | + volatile modem_lpcon_test_conf_reg_t test_conf; |
| 312 | + volatile modem_lpcon_lp_timer_conf_reg_t lp_timer_conf; |
| 313 | + volatile modem_lpcon_coex_lp_clk_conf_reg_t coex_lp_clk_conf; |
| 314 | + volatile modem_lpcon_wifi_lp_clk_conf_reg_t wifi_lp_clk_conf; |
| 315 | + volatile modem_lpcon_modem_src_clk_conf_reg_t modem_src_clk_conf; |
| 316 | + volatile modem_lpcon_modem_32k_clk_conf_reg_t modem_32k_clk_conf; |
| 317 | + volatile modem_lpcon_clk_conf_reg_t clk_conf; |
| 318 | + volatile modem_lpcon_clk_conf_force_on_reg_t clk_conf_force_on; |
| 319 | + volatile modem_lpcon_clk_conf_power_st_reg_t clk_conf_power_st; |
| 320 | + volatile modem_lpcon_rst_conf_reg_t rst_conf; |
| 321 | + volatile modem_lpcon_tick_conf_reg_t tick_conf; |
| 322 | + volatile modem_lpcon_mem_conf_reg_t mem_conf; |
| 323 | + volatile modem_lpcon_mem_rf1_aux_ctrl_reg_t mem_rf1_aux_ctrl; |
| 324 | + volatile modem_lpcon_mem_rf2_aux_ctrl_reg_t mem_rf2_aux_ctrl; |
| 325 | + volatile modem_lpcon_apb_mem_sel_reg_t apb_mem_sel; |
| 326 | + volatile modem_lpcon_dcmem_valid_0_reg_t dcmem_valid_0; |
| 327 | + volatile modem_lpcon_dcmem_valid_1_reg_t dcmem_valid_1; |
| 328 | + volatile modem_lpcon_dcmem_valid_2_reg_t dcmem_valid_2; |
| 329 | + volatile modem_lpcon_dcmem_valid_3_reg_t dcmem_valid_3; |
| 330 | + volatile modem_lpcon_date_reg_t date; |
| 331 | +} modem_lpcon_dev_t; |
| 332 | + |
| 333 | +extern modem_lpcon_dev_t MODEM_LPCON; |
| 334 | + |
| 335 | +#ifndef __cplusplus |
| 336 | +_Static_assert(sizeof(modem_lpcon_dev_t) == 0x50, "Invalid size of modem_lpcon_dev_t structure"); |
| 337 | +#endif |
| 338 | + |
| 339 | +#ifdef __cplusplus |
| 340 | +} |
| 341 | +#endif |
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