feat(gdma): support gdma on esp32h4

Kainarx · Kainarx · commit e353f92b66f5 · 2025-04-15T11:15:40.000+08:00
diff --git a/components/hal/esp32h4/include/hal/ahb_dma_ll.h b/components/hal/esp32h4/include/hal/ahb_dma_ll.h
diff --git a/components/hal/esp32h4/include/hal/gdma_ll.h b/components/hal/esp32h4/include/hal/gdma_ll.h
@@ -0,0 +1,37 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include "soc/pcr_struct.h"
+#include "hal/ahb_dma_ll.h"
+#define GDMA_LL_AHB_BURST_SIZE_ADJUSTABLE 1 // AHB GDMA supports adjustable burst size
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Enable the bus clock for the DMA module
+ */
+static inline void gdma_ll_enable_bus_clock(int group_id, bool enable)
+{
+    (void)group_id;
+    PCR.gdma_conf.gdma_clk_en = enable;
+}
+
+/**
+ * @brief Reset the DMA module
+ */
+static inline void gdma_ll_reset_register(int group_id)
+{
+    (void)group_id;
+    PCR.gdma_conf.gdma_rst_en = 1;
+    PCR.gdma_conf.gdma_rst_en = 0;
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/components/hal/include/hal/apm_hal.h b/components/hal/include/hal/apm_hal.h
@@ -251,6 +251,12 @@ int apm_hal_apm_ctrl_get_int_src_num(apm_ctrl_path_t *apm_path);
 #endif //CONFIG_IDF_TARGET_ESP32P4
 
 #elif SOC_APM_CTRL_FILTER_SUPPORTED //!SOC_APM_SUPPORTED
+
+#if CONFIG_IDF_TARGET_ESP32H4
+#include "soc/hp_apm_reg.h"
+#define apm_hal_apm_ctrl_filter_enable_all(en) \
+    REG_WRITE(HP_APM_FUNC_CTRL_REG, en ? 0xFFFFFFFF : 0);
+#else
 #include "soc/hp_apm_reg.h"
 #include "soc/lp_apm_reg.h"
 #include "soc/lp_apm0_reg.h"
@@ -259,9 +265,10 @@ int apm_hal_apm_ctrl_get_int_src_num(apm_ctrl_path_t *apm_path);
     REG_WRITE(LP_APM_FUNC_CTRL_REG, en ? 0xFFFFFFFF : 0); \
     REG_WRITE(LP_APM0_FUNC_CTRL_REG, en ? 0xFFFFFFFF : 0); \
     REG_WRITE(HP_APM_FUNC_CTRL_REG, en ? 0xFFFFFFFF : 0);
-
 #endif
 
+#endif //SOC_APM_CTRL_FILTER_SUPPORTED
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/soc/esp32c2/gdma_periph.c b/components/soc/esp32c2/gdma_periph.c
@@ -9,7 +9,6 @@
 const gdma_signal_conn_t gdma_periph_signals = {
     .groups = {
         [0] = {
-            .module = PERIPH_GDMA_MODULE,
             .pairs = {
                 [0]  = {
                     .rx_irq_id = ETS_DMA_CH0_INTR_SOURCE,
diff --git a/components/soc/esp32c3/gdma_periph.c b/components/soc/esp32c3/gdma_periph.c
@@ -9,7 +9,6 @@
 const gdma_signal_conn_t gdma_periph_signals = {
     .groups = {
         [0] = {
-            .module = PERIPH_GDMA_MODULE,
             .pairs = {
                 [0]  = {
                     .rx_irq_id = ETS_DMA_CH0_INTR_SOURCE,
diff --git a/components/soc/esp32c5/gdma_periph.c b/components/soc/esp32c5/gdma_periph.c
@@ -10,7 +10,6 @@
 const gdma_signal_conn_t gdma_periph_signals = {
     .groups = {
         [0] = {
-            .module = PERIPH_GDMA_MODULE,
             .pairs = {
                 [0]  = {
                     .rx_irq_id = ETS_DMA_IN_CH0_INTR_SOURCE,
diff --git a/components/soc/esp32c6/gdma_periph.c b/components/soc/esp32c6/gdma_periph.c
@@ -10,7 +10,6 @@
 const gdma_signal_conn_t gdma_periph_signals = {
     .groups = {
         [0] = {
-            .module = PERIPH_GDMA_MODULE,
             .pairs = {
                 [0]  = {
                     .rx_irq_id = ETS_DMA_IN_CH0_INTR_SOURCE,
diff --git a/components/soc/esp32c61/gdma_periph.c b/components/soc/esp32c61/gdma_periph.c
@@ -10,7 +10,6 @@
 const gdma_signal_conn_t gdma_periph_signals = {
     .groups = {
         [0] = {
-            .module = PERIPH_GDMA_MODULE,
             .pairs = {
                 [0]  = {
                     .rx_irq_id = ETS_DMA_IN_CH0_INTR_SOURCE,
diff --git a/components/soc/esp32h2/gdma_periph.c b/components/soc/esp32h2/gdma_periph.c
@@ -10,7 +10,6 @@
 const gdma_signal_conn_t gdma_periph_signals = {
     .groups = {
         [0] = {
-            .module = PERIPH_GDMA_MODULE,
             .pairs = {
                 [0]  = {
                     .rx_irq_id = ETS_DMA_IN_CH0_INTR_SOURCE,
diff --git a/components/soc/esp32h21/gdma_periph.c b/components/soc/esp32h21/gdma_periph.c
@@ -10,7 +10,6 @@
 const gdma_signal_conn_t gdma_periph_signals = {
     .groups = {
         [0] = {
-            .module = PERIPH_GDMA_MODULE,
             .pairs = {
                 [0]  = {
                     .rx_irq_id = ETS_DMA_IN_CH0_INTR_SOURCE,
diff --git a/components/soc/esp32h4/gdma_periph.c b/components/soc/esp32h4/gdma_periph.c
@@ -0,0 +1,37 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "soc/gdma_periph.h"
+#include "soc/ahb_dma_reg.h"
+
+const gdma_signal_conn_t gdma_periph_signals = {
+    .groups = {
+        [0] = {
+            .pairs = {
+                [0]  = {
+                    .rx_irq_id = ETS_DMA_IN_CH0_INTR_SOURCE,
+                    .tx_irq_id = ETS_DMA_OUT_CH0_INTR_SOURCE,
+                },
+                [1]  = {
+                    .rx_irq_id = ETS_DMA_IN_CH1_INTR_SOURCE,
+                    .tx_irq_id = ETS_DMA_OUT_CH1_INTR_SOURCE,
+                },
+                [2]  = {
+                    .rx_irq_id = ETS_DMA_IN_CH2_INTR_SOURCE,
+                    .tx_irq_id = ETS_DMA_OUT_CH2_INTR_SOURCE,
+                },
+                [3]  = {
+                    .rx_irq_id = ETS_DMA_IN_CH3_INTR_SOURCE,
+                    .tx_irq_id = ETS_DMA_OUT_CH3_INTR_SOURCE,
+                },
+                [4]  = {
+                    .rx_irq_id = ETS_DMA_IN_CH4_INTR_SOURCE,
+                    .tx_irq_id = ETS_DMA_OUT_CH4_INTR_SOURCE,
+                },
+            }
+        }
+    }
+};
diff --git a/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in
@@ -7,10 +7,22 @@ config SOC_UART_SUPPORTED
     bool
     default y
 
+config SOC_GDMA_SUPPORTED
+    bool
+    default y
+
+config SOC_AHB_GDMA_SUPPORTED
+    bool
+    default y
+
 config SOC_GPTIMER_SUPPORTED
     bool
     default y
 
+config SOC_ASYNC_MEMCPY_SUPPORTED
+    bool
+    default y
+
 config SOC_EFUSE_KEY_PURPOSE_FIELD
     bool
     default y
@@ -135,6 +147,26 @@ config SOC_CPU_HAS_LOCKUP_RESET
     bool
     default y
 
+config SOC_DMA_CAN_ACCESS_FLASH
+    bool
+    default y
+
+config SOC_AHB_GDMA_VERSION
+    int
+    default 2
+
+config SOC_GDMA_NUM_GROUPS_MAX
+    int
+    default 1
+
+config SOC_GDMA_PAIRS_PER_GROUP_MAX
+    int
+    default 5
+
+config SOC_AHB_GDMA_SUPPORT_PSRAM
+    bool
+    default y
+
 config SOC_GPIO_PORT
     int
     default 1
@@ -367,6 +399,10 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_128
     bool
     default y
 
+config SOC_APM_CTRL_FILTER_SUPPORTED
+    bool
+    default y
+
 config SOC_UART_NUM
     int
     default 2
diff --git a/components/soc/esp32h4/include/soc/gdma_channel.h b/components/soc/esp32h4/include/soc/gdma_channel.h
@@ -3,3 +3,34 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
+
+#pragma once
+
+// The following macros have a format SOC_[periph][instance_id] to make it work with `GDMA_MAKE_TRIGGER`
+#define SOC_GDMA_TRIG_PERIPH_M2M0    (-1)
+#define SOC_GDMA_TRIG_PERIPH_SPI3    (0)
+#define SOC_GDMA_TRIG_PERIPH_SPI2    (1)
+#define SOC_GDMA_TRIG_PERIPH_UHCI0   (2)
+#define SOC_GDMA_TRIG_PERIPH_I2S0    (3)
+#define SOC_GDMA_TRIG_PERIPH_AES0    (4)
+#define SOC_GDMA_TRIG_PERIPH_ASRC0   (5)
+#define SOC_GDMA_TRIG_PERIPH_ASRC1   (6)
+#define SOC_GDMA_TRIG_PERIPH_SHA0    (7)
+#define SOC_GDMA_TRIG_PERIPH_ADC0    (8)
+#define SOC_GDMA_TRIG_PERIPH_PARLIO0 (9)
+
+// On which system bus is the DMA instance of the peripheral connection mounted
+#define SOC_GDMA_BUS_ANY (-1)
+#define SOC_GDMA_BUS_AHB (0)
+
+#define SOC_GDMA_TRIG_PERIPH_M2M0_BUS     SOC_GDMA_BUS_ANY
+#define SOC_GDMA_TRIG_PERIPH_SPI3_BUS     SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_SPI2_BUS     SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_UHCI0_BUS    SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_I2S0_BUS     SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_AES0_BUS     SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_ASRC0_BUS    SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_ASRC1_BUS    SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_SHA0_BUS     SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_ADC0_BUS     SOC_GDMA_BUS_AHB
+#define SOC_GDMA_TRIG_PERIPH_PARLIO0_BUS  SOC_GDMA_BUS_AHB
diff --git a/components/soc/esp32h4/include/soc/soc_caps.h b/components/soc/esp32h4/include/soc/soc_caps.h
@@ -29,8 +29,8 @@
 // #define SOC_ANA_CMPR_SUPPORTED          1    // TODO: [ESP32H4] IDF-12395 big change!!
 // #define SOC_DEDICATED_GPIO_SUPPORTED    1    // TODO: [ESP32H4] IDF-12401
 #define SOC_UART_SUPPORTED              1       // TODO: [ESP32H4] IDF-12398
-// #define SOC_GDMA_SUPPORTED              1    // TODO: [ESP32H4] IDF-12382
-// #define SOC_AHB_GDMA_SUPPORTED          1    // TODO: [ESP32H4] IDF-12382
+#define SOC_GDMA_SUPPORTED              1
+#define SOC_AHB_GDMA_SUPPORTED          1
 #define SOC_GPTIMER_SUPPORTED           1
 // #define SOC_PCNT_SUPPORTED              1    // TODO: [ESP32H4] IDF-12338
 // #define SOC_MCPWM_SUPPORTED             1    // TODO: [ESP32H4] IDF-12380
@@ -39,7 +39,7 @@
 // #define SOC_PARLIO_SUPPORTED            1    // TODO: [ESP32H4] IDF-12345 IDF-12347
 // #define SOC_BT_SUPPORTED                1
 // #define SOC_IEEE802154_SUPPORTED        1
-// #define SOC_ASYNC_MEMCPY_SUPPORTED      1    // TODO: [ESP32H4] IDF-12382
+#define SOC_ASYNC_MEMCPY_SUPPORTED      1
 // #define SOC_USB_SERIAL_JTAG_SUPPORTED   1    // TODO: [ESP32H4] IDF-12396
 // #define SOC_TEMP_SENSOR_SUPPORTED       1    // TODO: [ESP32H4] IDF-12404
 // #define SOC_SUPPORTS_SECURE_DL_MODE     1
@@ -176,11 +176,16 @@
     See TRM DS chapter for more details */
 // #define SOC_DS_KEY_CHECK_MAX_WAIT_US (1100)
 
+/*-------------------------- DMA Common CAPS ----------------------------------------*/
+#define SOC_DMA_CAN_ACCESS_FLASH 1 /*!< DMA can access Flash memory */
+
 /*-------------------------- GDMA CAPS -------------------------------------*/
-// #define SOC_AHB_GDMA_VERSION            1U
-// #define SOC_GDMA_NUM_GROUPS_MAX         1U
-// #define SOC_GDMA_PAIRS_PER_GROUP_MAX    4
-// #define SOC_GDMA_SUPPORT_ETM            1  // Support ETM submodule
+#define SOC_AHB_GDMA_VERSION                2
+#define SOC_GDMA_NUM_GROUPS_MAX             1U
+#define SOC_GDMA_PAIRS_PER_GROUP_MAX        5
+// #define SOC_GDMA_SUPPORT_ETM                1  // Support ETM submodule  TODO: [ESP32H4] IDF-12383
+// #define SOC_GDMA_SUPPORT_SLEEP_RETENTION    1  // TODO: [ESP32H4] IDF-12384
+#define SOC_AHB_GDMA_SUPPORT_PSRAM 1
 
 /*-------------------------- ETM CAPS --------------------------------------*/
 // #define SOC_ETM_GROUPS                  1U  // Number of ETM groups
@@ -470,6 +475,9 @@
 #define SOC_FLASH_ENCRYPTION_XTS_AES        1
 #define SOC_FLASH_ENCRYPTION_XTS_AES_128    1
 
+/*-------------------------- APM CAPS ----------------------------------------*/
+#define SOC_APM_CTRL_FILTER_SUPPORTED   1 /*!< Support for APM control filter */
+
 /*------------------------ Anti DPA (Security) CAPS --------------------------*/
 // #define SOC_CRYPTO_DPA_PROTECTION_SUPPORTED     1
 
diff --git a/components/soc/esp32h4/ld/esp32h4.peripherals.ld b/components/soc/esp32h4/ld/esp32h4.peripherals.ld
@@ -24,7 +24,7 @@ PROVIDE ( LEDC                = 0x6001B000 );
 PROVIDE ( TWAI0               = 0x6001C000 );
 PROVIDE ( USB_SERIAL_JTAG     = 0x6001D000 );
 PROVIDE ( RMT                 = 0x6001E000 );
-PROVIDE ( GDMA                = 0x6001F000 );
+PROVIDE ( AHB_DMA             = 0x6001F000 );
 PROVIDE ( PAU                 = 0x60020000 );
 PROVIDE ( SOC_ETM             = 0x60021000 );
 PROVIDE ( ADC                 = 0x60022000 );
diff --git a/components/soc/esp32h4/register/soc/ahb_dma_struct.h b/components/soc/esp32h4/register/soc/ahb_dma_struct.h
diff --git a/components/soc/esp32h4/register/soc/hp_apm_reg.h b/components/soc/esp32h4/register/soc/hp_apm_reg.h
diff --git a/components/soc/esp32h4/register/soc/hp_system_reg.h b/components/soc/esp32h4/register/soc/hp_system_reg.h
diff --git a/components/soc/esp32s3/gdma_periph.c b/components/soc/esp32s3/gdma_periph.c
