refactor(gptimer): clean up SOC capabilities for GPTIMER and Timer Group

- Remove GPTIMER and TIMG related definitions from soc_caps_full.h files
- Move timer peripheral definitions to appropriate HAL layer files
- Update references across components to use proper HAL abstractions
- Consolidate timer group and GPTIMER capabilities organization
- Ensure consistent timer configuration across all ESP32 variants

This refactoring improves the separation of concerns between SOC
capabilities and HAL implementations for timer-related functionality.

Author: suda-morris

components/esp_driver_gptimer/src/gptimer.c

@@ -41,12 +41,12 @@ static esp_err_t gptimer_register_to_group(gptimer_t *timer)
 {
     gptimer_group_t *group = NULL;
     int timer_id = -1;
-    for (int i = 0; i < SOC_TIMG_ATTR(INST_NUM); i++) {
+    for (int i = 0; i < TIMG_LL_GET(INST_NUM); i++) {
         group = gptimer_acquire_group_handle(i);
         ESP_RETURN_ON_FALSE(group, ESP_ERR_NO_MEM, TAG, "no mem for group (%d)", i);
         // loop to search free timer in the group
         portENTER_CRITICAL(&group->spinlock);
-        for (int j = 0; j < SOC_GPTIMER_ATTR(TIMERS_PER_TIMG); j++) {
+        for (int j = 0; j < TIMG_LL_GET(GPTIMERS_PER_INST); j++) {
             if (!group->timers[j]) {
                 timer_id = j;
                 group->timers[j] = timer;

components/esp_driver_gptimer/src/gptimer_common.c

@@ -12,8 +12,8 @@
 
 typedef struct gptimer_platform_t {
     _lock_t mutex;                             // platform level mutex lock
-    gptimer_group_t *groups[SOC_TIMG_ATTR(INST_NUM)]; // timer group pool
-    int group_ref_counts[SOC_TIMG_ATTR(INST_NUM)];    // reference count used to protect group install/uninstall
+    gptimer_group_t *groups[TIMG_LL_GET(INST_NUM)]; // timer group pool
+    int group_ref_counts[TIMG_LL_GET(INST_NUM)];    // reference count used to protect group install/uninstall
 } gptimer_platform_t;
 
 // gptimer driver platform, it's always a singleton

components/esp_driver_gptimer/src/gptimer_priv.h

@@ -14,7 +14,7 @@
 // Set the maximum log level for gptimer driver
 #define LOG_LOCAL_LEVEL ESP_LOG_VERBOSE
 #endif
-#include "soc/soc_caps_full.h"
+#include "soc/soc_caps.h"
 #include "freertos/FreeRTOS.h"
 #include "esp_err.h"
 #include "esp_log.h"
@@ -23,7 +23,7 @@
 #include "esp_intr_alloc.h"
 #include "esp_heap_caps.h"
 #include "esp_pm.h"
-#include "soc/timer_periph.h"
+#include "hal/timer_periph.h"
 #include "hal/timer_types.h"
 #include "hal/timer_hal.h"
 #include "hal/timer_ll.h"
@@ -69,7 +69,7 @@ typedef struct gptimer_t gptimer_t;
 typedef struct gptimer_group_t {
     int group_id;
     portMUX_TYPE spinlock; // to protect per-group register level concurrent access
-    gptimer_t *timers[SOC_GPTIMER_ATTR(TIMERS_PER_TIMG)];
+    gptimer_t *timers[TIMG_LL_GET(GPTIMERS_PER_INST)];
 } gptimer_group_t;
 
 typedef enum {

components/esp_driver_gptimer/test_apps/gptimer/main/test_gptimer.c

@@ -28,4 +28,4 @@ idf_component_register(SRCS ${srcs}
                        PRIV_INCLUDE_DIRS ${priv_includes}
                        LDFRAGMENTS "linker.lf"
                        REQUIRES "freertos"
-                       PRIV_REQUIRES "soc" "esp_rom" "esp_system")
+                       PRIV_REQUIRES esp_hal_wdt)

components/esp_gdbstub/CMakeLists.txt

@@ -5,24 +5,22 @@
  */
 
 #include <string.h>
-#include "sys/reent.h"
+#include <sys/param.h>
+#include <sys/reent.h>
+#include "sdkconfig.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
 #include "esp_gdbstub.h"
 #include "esp_gdbstub_common.h"
 #include "esp_gdbstub_memory_regions.h"
-#include "sdkconfig.h"
-#include <sys/param.h>
-
-#include "soc/soc_caps.h"
-#include "soc/uart_reg.h"
-#include "soc/periph_defs.h"
 #include "esp_attr.h"
 #include "esp_cpu.h"
 #include "esp_log.h"
 #include "esp_intr_alloc.h"
+
+#include "soc/soc_caps.h"
+#include "soc/interrupts.h"
 #include "hal/wdt_hal.h"
-#include "freertos/FreeRTOS.h"
-#include "freertos/task.h"
-#include "sdkconfig.h"
 
 #if GDBSTUB_QXFER_FEATURES_ENABLED
 #define GDBSTUB_QXFER_SUPPORTED_STR ";qXfer:features:read+"
@@ -124,18 +122,18 @@ static wdt_hal_context_t rtc_wdt_ctx = RWDT_HAL_CONTEXT_DEFAULT();
 static bool rtc_wdt_ctx_enabled = false;
 static wdt_hal_context_t wdt0_context = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
 static bool wdt0_context_enabled = false;
-#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
+#if TIMG_LL_GET(INST_NUM) >= 2
 static wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1};
 static bool wdt1_context_enabled = false;
-#endif // SOC_MODULE_ATTR(TIMG, INST_NUM)
+#endif // TIMG_LL_GET(INST_NUM)
 
 /**
  * Disable all enabled WDTs
  */
 static inline void disable_all_wdts(void)
 {
     wdt0_context_enabled = wdt_hal_is_enabled(&wdt0_context);
-    #if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
+    #if TIMG_LL_GET(INST_NUM) >= 2
     wdt1_context_enabled = wdt_hal_is_enabled(&wdt1_context);
     #endif
     rtc_wdt_ctx_enabled = wdt_hal_is_enabled(&rtc_wdt_ctx);
@@ -148,15 +146,15 @@ static inline void disable_all_wdts(void)
         wdt_hal_write_protect_enable(&wdt0_context);
     }
 
-    #if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
+    #if TIMG_LL_GET(INST_NUM) >= 2
     /* Interrupt WDT is the Main Watchdog Timer of Timer Group 1 */
     if (true == wdt1_context_enabled) {
         wdt_hal_write_protect_disable(&wdt1_context);
         wdt_hal_disable(&wdt1_context);
         wdt_hal_feed(&wdt1_context);
         wdt_hal_write_protect_enable(&wdt1_context);
     }
-    #endif // SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
+    #endif // TIMG_LL_GET(INST_NUM) >= 2
 
     if (true == rtc_wdt_ctx_enabled) {
         wdt_hal_write_protect_disable(&rtc_wdt_ctx);
@@ -177,14 +175,14 @@ static inline void enable_all_wdts(void)
         wdt_hal_enable(&wdt0_context);
         wdt_hal_write_protect_enable(&wdt0_context);
     }
-    #if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
+    #if TIMG_LL_GET(INST_NUM) >= 2
     /* Interrupt WDT is the Main Watchdog Timer of Timer Group 1 */
     if (false == wdt1_context_enabled) {
         wdt_hal_write_protect_disable(&wdt1_context);
         wdt_hal_enable(&wdt1_context);
         wdt_hal_write_protect_enable(&wdt1_context);
     }
-    #endif // SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2
+    #endif // TIMG_LL_GET(INST_NUM) >= 2
 
     if (false == rtc_wdt_ctx_enabled) {
         wdt_hal_write_protect_disable(&rtc_wdt_ctx);

components/esp_gdbstub/src/gdbstub.c

@@ -1,6 +1,7 @@
-# ESP Hardware Abstraction Layer for Timer Groups (`esp_hal_timg`)
+# ESP Hardware Abstraction Layer for Timer Group Peripheral
 
-⚠️ **Notice**: This HAL component is under active development. API stability and backward-compatibility between versions are not guaranteed at this time.
+> [!NOTE]
+> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems.
 
 ## Overview
 
@@ -11,7 +12,7 @@ The `esp_hal_timg` component provides a **Hardware Abstraction Layer** for the G
 The HAL architecture consists of two primary layers:
 
 1. **HAL Layer (Upper)**: Defines the operational sequences and data structures required to interact with timer peripherals, including:
-   - Initialization and deinitialization
+   - Initialization and de-initialization
    - Timer control operations (start, stop, reload)
    - Alarm and event handling
    - Counter operations

components/esp_hal_timg/README.md

@@ -13,13 +13,13 @@
 #include "soc/timer_group_struct.h"
 #include "soc/dport_reg.h"
 
+// Get timer group register base address with giving group number
+#define LACT_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-// Get timer group register base address with giving group number
-#define LACT_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
-
 /**
  * @brief Set clock prescale for LACT timer
  *

components/esp_hal_timg/esp32/include/hal/lact_ll.h

@@ -15,19 +15,25 @@
 #include "soc/timer_group_struct.h"
 #include "soc/dport_reg.h"
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+// Total number of general purpose timers
+#define TIMER_LL_GPTIMERS_TOTAL     (TIMG_LL_INST_NUM * TIMG_LL_GPTIMERS_PER_INST)
 
 // Get timer group register base address with giving group number
 #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
 
+// Bit width of GPTIMER counter
+#define TIMER_LL_COUNTER_BIT_WIDTH   64
+
 // Get alarm interrupt mask with the given timer ID
 #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
 
 // Support APB as function clock
 #define TIMER_LL_FUNC_CLOCK_SUPPORT_APB 1
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @brief Set clock source for timer
  *

components/esp_hal_timg/esp32/include/hal/timer_ll.h

@@ -14,6 +14,14 @@
 #include "soc/timer_group_struct.h"
 #include "soc/dport_reg.h"
 
+#define TIMG_LL_GET(_attr) TIMG_LL_ ## _attr
+
+// Number of Timer Group instances
+#define TIMG_LL_INST_NUM 2
+
+// Number of general purpose timers in each Timer Group
+#define TIMG_LL_GPTIMERS_PER_INST 2
+
 #ifdef __cplusplus
 extern "C" {
 #endif