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esp-wzhesp-wzh
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feat(soc): add esp32h4 PAU initial support
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5 files changed

+111
-3
lines changed

5 files changed

+111
-3
lines changed

‎components/soc/esp32h4/include/soc/Kconfig.soc_caps.in‎

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Original file line numberDiff line numberDiff line change
@@ -43,6 +43,10 @@ config SOC_MODEM_CLOCK_SUPPORTED
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bool
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default y
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config SOC_PAU_SUPPORTED
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bool
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default y
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config SOC_WDT_SUPPORTED
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bool
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default y
@@ -531,6 +535,14 @@ config SOC_PM_PAU_LINK_NUM
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int
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default 4
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config SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE
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bool
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default y
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config SOC_PM_RETENTION_MODULE_NUM
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int
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default 32
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config SOC_MODEM_CLOCK_IS_INDEPENDENT
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bool
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default y

‎components/soc/esp32h4/include/soc/retention_periph_defs.h‎

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@@ -0,0 +1,93 @@
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/*
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include "soc_caps.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum periph_retention_module {
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SLEEP_RETENTION_MODULE_MIN = 0,
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SLEEP_RETENTION_MODULE_NULL = SLEEP_RETENTION_MODULE_MIN, /* This module is for all peripherals that can't survive from PD_TOP to call init only. Shouldn't have any dependency. */
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/* clock module, which includes system and modem */
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SLEEP_RETENTION_MODULE_CLOCK_SYSTEM = 1,
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SLEEP_RETENTION_MODULE_CLOCK_MODEM = 2,
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/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
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* TEE, APM, UART, IOMUX, SPIMEM, SysTimer, etc.. */
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SLEEP_RETENTION_MODULE_SYS_PERIPH = 3,
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/* Timer Group by target*/
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SLEEP_RETENTION_MODULE_TG0_WDT = 4,
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SLEEP_RETENTION_MODULE_TG1_WDT = 5,
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SLEEP_RETENTION_MODULE_TG0_TIMER0 = 6,
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SLEEP_RETENTION_MODULE_TG1_TIMER0 = 7,
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/* GDMA by channel */
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SLEEP_RETENTION_MODULE_GDMA_CH0 = 8,
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SLEEP_RETENTION_MODULE_GDMA_CH1 = 9,
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SLEEP_RETENTION_MODULE_GDMA_CH2 = 10,
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SLEEP_RETENTION_MODULE_GDMA_CH3 = 11,
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SLEEP_RETENTION_MODULE_GDMA_CH4 = 12,
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/* MISC Peripherals */
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SLEEP_RETENTION_MODULE_ADC = 13,
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SLEEP_RETENTION_MODULE_I2C0 = 14,
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SLEEP_RETENTION_MODULE_I2C1 = 15,
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SLEEP_RETENTION_MODULE_RMT0 = 16,
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SLEEP_RETENTION_MODULE_UART0 = 17,
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SLEEP_RETENTION_MODULE_UART1 = 18,
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SLEEP_RETENTION_MODULE_I2S0 = 19,
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SLEEP_RETENTION_MODULE_ETM0 = 20,
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SLEEP_RETENTION_MODULE_TEMP_SENSOR = 21,
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SLEEP_RETENTION_MODULE_TWAI0 = 22,
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SLEEP_RETENTION_MODULE_PARLIO0 = 23,
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SLEEP_RETENTION_MODULE_GPSPI2 = 24,
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SLEEP_RETENTION_MODULE_LEDC = 25,
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SLEEP_RETENTION_MODULE_PCNT0 = 26,
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SLEEP_RETENTION_MODULE_MCPWM0 = 27,
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/* Modem module, which includes BLE and 802.15.4 */
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SLEEP_RETENTION_MODULE_BLE_MAC = 28,
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SLEEP_RETENTION_MODULE_BT_BB = 29,
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SLEEP_RETENTION_MODULE_802154_MAC = 30,
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SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
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} periph_retention_module_t;
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#define is_top_domain_module(m) \
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( ((m) == SLEEP_RETENTION_MODULE_NULL) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_CLOCK_SYSTEM) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_SYS_PERIPH) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_TG0_WDT) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_TG0_TIMER0) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_TG1_TIMER0) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH0) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH1) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH2) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH3) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH4) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_ADC) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_I2C0) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_I2C1) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_RMT0) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_UART0) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_UART1) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_I2S0) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_ETM0) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_TEMP_SENSOR) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_TWAI0) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_PCNT0) ? true \
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: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
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: false)
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#ifdef __cplusplus
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}
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#endif

‎components/soc/esp32h4/include/soc/soc_caps.h‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -69,7 +69,7 @@
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// #define SOC_BOD_SUPPORTED 1 // TODO: [ESP32H4] IDF-12295
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// #define SOC_APM_SUPPORTED 1 // TODO: [ESP32H4] IDF-12256
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// #define SOC_PMU_SUPPORTED 1 // TODO: [ESP32H4] IDF-12286
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// #define SOC_PAU_SUPPORTED 1
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#define SOC_PAU_SUPPORTED 1
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// #define SOC_LP_TIMER_SUPPORTED 1 // TODO: [ESP32H4] IDF-12274
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// #define SOC_LP_AON_SUPPORTED 1
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// #define SOC_LP_PERIPHERALS_SUPPORTED 1
@@ -531,7 +531,9 @@
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// #define SOC_PM_MODEM_RETENTION_BY_REGDMA (1)
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// #define SOC_PM_RETENTION_HAS_CLOCK_BUG (1)
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534-
#define SOC_PM_PAU_LINK_NUM (4)
534+
#define SOC_PM_PAU_LINK_NUM (4)
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#define SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE (1)
536+
#define SOC_PM_RETENTION_MODULE_NUM (32)
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536538
/*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
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// #define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1) // TODO: [ESP32H4] IDF-12285

‎components/soc/esp32h4/wdt_periph.c‎

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@@ -7,7 +7,7 @@
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#include "soc/wdt_periph.h"
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#include "soc/soc_caps.h"
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10-
#if SOC_PAU_SUPPORTED
10+
#if SOC_PAU_SUPPORTED && SOC_MWDT_SUPPORT_SLEEP_RETENTION
1111

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#define N_REGS_TGWDT 6 // TIMG_WDTCONFIG0_REG ... TIMG_WDTCONFIG5_REG & TIMG_INT_ENA_TIMERS_REG
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‎components/soc/include/soc/regdma.h‎

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@@ -48,6 +48,7 @@ extern "C" {
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#define REGDMA_MODEM_BT_BB_LINK(_pri) ((0x15 << 8) | _pri)
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#define REGDMA_MODEM_IEEE802154_LINK(_pri) ((0x16 << 8) | _pri)
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#define REGDMA_GDMA_LINK(_pri) ((0x17 << 8) | _pri)
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#define REGDMA_AHB_DMA_LINK(_pri) ((0x17 << 8) | _pri)
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#define REGDMA_I2C_LINK(_pri) ((0x18 << 8) | _pri)
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#define REGDMA_RMT_LINK(_pri) ((0x19 << 8) | _pri)
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#define REGDMA_TG0_WDT_LINK(_pri) ((0x1A << 8) | _pri)

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