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I noticed a few structs where the flags didn't show up correctly in the
docs.
Naming the flag struct makes the individual flags appear properly in the
nested struct.
Merges #17803Closes#17804
uint32_tresolution_hz; /*!< Resolution of capture timer */
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struct {
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/// Extra configuration flags for capture timer
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structextra_mcpwm_capture_timer_flags {
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uint32_tallow_pd: 1; /*!< Set to allow power down. When this flag set, the driver will backup/restore the MCPWM registers before/after entering/exist sleep mode.
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By this approach, the system can power off MCPWM's power domain.
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This can save power, but at the expense of more RAM being consumed.*/
if set to 0, the driver will try to allocate an interrupt with a relative low priority (1,2,3) */
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struct {
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/// Extra configuration flags for MCPWM timer
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structextra_mcpwm_timer_flags {
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uint32_tupdate_period_on_empty: 1; /*!< Whether to update period when timer counts to zero */
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uint32_tupdate_period_on_sync: 1; /*!< Whether to update period on sync event */
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uint32_tallow_pd: 1; /*!< Set to allow power down. When this flag set, the driver will backup/restore the MCPWM registers before/after entering/exist sleep mode.
Copy file name to clipboardExpand all lines: components/esp_driver_parlio/include/driver/parlio_rx.h
+3-2Lines changed: 3 additions & 2 deletions
Original file line number
Diff line number
Diff line change
@@ -33,14 +33,15 @@ typedef struct {
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Only takes effect when using level or pulse delimiter, set to `-1` if only use the soft delimiter */
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gpio_num_tdata_gpio_nums[PARLIO_RX_UNIT_MAX_DATA_WIDTH]; /*!< Parallel IO data GPIO numbers, set to `-1` if it's not used,
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The driver will take [0 .. (data_width - 1)] as the data pins */
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struct {
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/// Extra configuration flags for PARLIO RX unit
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structextra_parlio_rx_unit_flags {
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uint32_tfree_clk : 1; /*!< Whether the input external clock is a free-running clock. A free-running clock will always keep running (e.g. I2S bclk),
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a non-free-running clock will start when there are data transporting and stop when the bus idle (e.g. SPI).
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This flag only takes effect when select PARLIO_CLK_SRC_EXTERNAL as clock source */
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uint32_tclk_gate_en : 1; /*!< Enable RX clock gating, only available when the clock direction is output(not supported on ESP32-C6)
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the output clock will be controlled by the valid gpio,
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i.e. high level of valid gpio to enable the clock output, low to disable */
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uint32_tallow_pd: 1; /*!< Set to allow power down. When this flag set, the driver will backup/restore the PARLIO registers before/after entering/exist sleep mode.
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uint32_tallow_pd: 1; /*!< Set to allow power down. When this flag set, the driver will backup/restore the PARLIO registers before/after entering/exist sleep mode.
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By this approach, the system can power off PARLIO's power domain.
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This can save power, but at the expense of more RAM being consumed. */
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