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test(coredump): collect all expected uart data first, then process lazily
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2 files changed

+38
-17
lines changed

2 files changed

+38
-17
lines changed

tools/test_apps/system/panic/pytest_panic.py

Lines changed: 30 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
1+
# SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
22
# SPDX-License-Identifier: CC0-1.0
33
import re
44
from typing import Any
@@ -125,14 +125,37 @@ def expect_coredump_flash_write_logs(dut: PanicTestDut, config: str) -> None:
125125
dut.expect_exact('Backing up stack @')
126126
dut.expect_exact('Restoring stack')
127127
dut.expect_exact('Core dump has been saved to flash.')
128-
dut.expect('Rebooting...')
128+
dut.expect(dut.REBOOT)
129+
130+
131+
def expect_coredump_uart_write_logs(dut: PanicTestDut, check_cpu_reset: Optional[bool] = True) -> Any:
132+
# ================= CORE DUMP START =================
133+
# B8AAAMAEgAGAAAAXAEAAAAAAABkAAAA
134+
# ...
135+
# ================= CORE DUMP END =================
136+
# Coredump checksum='9730d7ff'
137+
# Rebooting...
138+
# ..
139+
# rst:0xc (SW_CPU_RESET),boot:
140+
141+
# Read all uart logs until the end of the reset reason
142+
uart_str = dut.expect(',boot:', return_what_before_match=True).decode('utf-8', errors='ignore')
143+
coredump_base64 = uart_str.split(dut.COREDUMP_UART_START)[1].split(dut.COREDUMP_UART_END)[0].strip()
144+
uart_str = uart_str.split(dut.COREDUMP_UART_END)[1]
145+
assert re.search(dut.COREDUMP_CHECKSUM, uart_str)
146+
assert re.search(dut.REBOOT, uart_str)
147+
if check_cpu_reset:
148+
assert re.search(dut.CPU_RESET, uart_str)
149+
return coredump_base64
129150

130151

131152
def common_test(dut: PanicTestDut, config: str, expected_backtrace: Optional[List[str]] = None, check_cpu_reset: Optional[bool] = True,
132153
expected_coredump: Optional[Sequence[Union[str, Pattern[Any]]]] = None) -> None:
133154
if 'gdbstub' in config:
134155
if 'coredump' in config:
135-
dut.process_coredump_uart(expected_coredump, False)
156+
uart_str = dut.expect(dut.COREDUMP_CHECKSUM, return_what_before_match=True).decode('utf-8')
157+
coredump_base64 = uart_str.split(dut.COREDUMP_UART_START)[1].split(dut.COREDUMP_UART_END)[0].strip()
158+
dut.process_coredump_uart(coredump_base64, expected_coredump)
136159
dut.expect_exact('Entering gdb stub now.')
137160
dut.start_gdb_for_gdbstub()
138161
frames = dut.gdb_backtrace()
@@ -146,12 +169,14 @@ def common_test(dut: PanicTestDut, config: str, expected_backtrace: Optional[Lis
146169
expected_coredump = None
147170

148171
if 'uart' in config:
149-
dut.process_coredump_uart(expected_coredump)
172+
coredump_base64 = expect_coredump_uart_write_logs(dut, check_cpu_reset)
173+
dut.process_coredump_uart(coredump_base64, expected_coredump)
174+
check_cpu_reset = False # CPU reset is already checked in expect_coredump_uart_write_logs
150175
elif 'flash' in config:
151176
expect_coredump_flash_write_logs(dut, config)
152177
dut.process_coredump_flash(expected_coredump)
153178
elif 'panic' in config:
154-
dut.expect('Rebooting...', timeout=60)
179+
dut.expect(dut.REBOOT, timeout=60)
155180

156181
if check_cpu_reset:
157182
dut.expect_cpu_reset()

tools/test_apps/system/panic/test_panic_util/panic_dut.py

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
1+
# SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
22
# SPDX-License-Identifier: Unlicense OR CC0-1.0
33
import logging
44
import os
@@ -28,8 +28,11 @@ class PanicTestDut(IdfDut):
2828
BOOT_CMD_ADDR = 0x9000
2929
BOOT_CMD_SIZE = 0x1000
3030
DEFAULT_EXPECT_TIMEOUT = 10
31-
COREDUMP_UART_START = '================= CORE DUMP START ================='
32-
COREDUMP_UART_END = '================= CORE DUMP END ================='
31+
COREDUMP_UART_START = r'================= CORE DUMP START ================='
32+
COREDUMP_UART_END = r'================= CORE DUMP END ================='
33+
COREDUMP_CHECKSUM = r"Coredump checksum='([a-fA-F0-9]+)'"
34+
REBOOT = r'.*Rebooting\.\.\.'
35+
CPU_RESET = r'.*rst:.*(RTC_SW_CPU_RST|SW_CPU_RESET|SW_CPU)\b'
3336

3437
app: IdfApp
3538
serial: IdfSerial
@@ -105,7 +108,7 @@ def expect_reg_dump(self, core: Optional[int] = None) -> None:
105108

106109
def expect_cpu_reset(self) -> None:
107110
# no digital system reset for panic handling restarts (see IDF-7255)
108-
self.expect(r'.*rst:.*(RTC_SW_CPU_RST|SW_CPU_RESET|SW_CPU)')
111+
self.expect(self.CPU_RESET)
109112

110113
def expect_elf_sha256(self, caption: str = 'ELF file SHA256: ') -> None:
111114
"""Expect method for ELF SHA256 line"""
@@ -161,15 +164,8 @@ def _call_espcoredump(
161164
self.coredump_output.seek(0)
162165

163166
def process_coredump_uart(
164-
self, expected: Optional[List[Union[str, re.Pattern]]] = None, wait_reboot: bool = True
167+
self, coredump_base64: Any, expected: Optional[List[Union[str, re.Pattern]]] = None,
165168
) -> None:
166-
"""Extract the core dump from UART output of the test, run espcoredump on it"""
167-
self.expect(self.COREDUMP_UART_START)
168-
uart_data = self.expect('(.+)' + self.COREDUMP_UART_END)
169-
self.expect(re.compile(r"Coredump checksum='([a-fA-F0-9]+)'"))
170-
if wait_reboot:
171-
self.expect('Rebooting...')
172-
coredump_base64 = uart_data.group(1).decode('utf8')
173169
with open(os.path.join(self.logdir, 'coredump_data.b64'), 'w') as coredump_file:
174170
logging.info('Writing UART base64 core dump to %s', coredump_file.name)
175171
coredump_file.write(coredump_base64)

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