55 */
66#include "sdkconfig.h"
77#include <stdint.h>
8- #include "esp_attr .h"
8+ #include "esp_private/esp_system_attr .h"
99#include "esp_err.h"
1010#include "esp_cpu.h"
1111#include "esp_intr_alloc.h"
@@ -34,12 +34,12 @@ static volatile uint32_t reason[CONFIG_FREERTOS_NUMBER_OF_CORES];
3434ToDo: There is a small chance the CPU already has yielded when this ISR is serviced. In that case, it's running the intended task but
3535the ISR will cause it to switch _away_ from it. portYIELD_FROM_ISR will probably just schedule the task again, but have to check that.
3636*/
37- static inline void IRAM_ATTR esp_crosscore_isr_handle_yield (void )
37+ static inline void ESP_SYSTEM_IRAM_ATTR esp_crosscore_isr_handle_yield (void )
3838{
3939 portYIELD_FROM_ISR ();
4040}
4141
42- static void IRAM_ATTR esp_crosscore_isr (void * arg )
42+ static void ESP_SYSTEM_IRAM_ATTR esp_crosscore_isr (void * arg )
4343{
4444 uint32_t my_reason_val ;
4545 //A pointer to the correct reason array item is passed to this ISR.
@@ -93,19 +93,23 @@ void esp_crosscore_int_init(void)
9393 reason [esp_cpu_get_core_id ()] = 0 ;
9494 portEXIT_CRITICAL (& reason_spinlock );
9595 esp_err_t err __attribute__((unused )) = ESP_OK ;
96+ int flags = 0 ;
97+ #if CONFIG_ESP_SYSTEM_IN_IRAM
98+ flags |= ESP_INTR_FLAG_IRAM ;
99+ #endif
96100#if CONFIG_FREERTOS_NUMBER_OF_CORES > 1
97101 if (esp_cpu_get_core_id () == 0 ) {
98- err = esp_intr_alloc (SYS_CPU_INTR_FROM_CPU_0_SOURCE , ESP_INTR_FLAG_IRAM , esp_crosscore_isr , (void * )& reason [0 ], NULL );
102+ err = esp_intr_alloc (SYS_CPU_INTR_FROM_CPU_0_SOURCE , flags , esp_crosscore_isr , (void * )& reason [0 ], NULL );
99103 } else {
100- err = esp_intr_alloc (SYS_CPU_INTR_FROM_CPU_1_SOURCE , ESP_INTR_FLAG_IRAM , esp_crosscore_isr , (void * )& reason [1 ], NULL );
104+ err = esp_intr_alloc (SYS_CPU_INTR_FROM_CPU_1_SOURCE , flags , esp_crosscore_isr , (void * )& reason [1 ], NULL );
101105 }
102106#else
103- err = esp_intr_alloc (SYS_CPU_INTR_FROM_CPU_0_SOURCE , ESP_INTR_FLAG_IRAM , esp_crosscore_isr , (void * )& reason [0 ], NULL );
107+ err = esp_intr_alloc (SYS_CPU_INTR_FROM_CPU_0_SOURCE , flags , esp_crosscore_isr , (void * )& reason [0 ], NULL );
104108#endif
105109 ESP_ERROR_CHECK (err );
106110}
107111
108- static void IRAM_ATTR esp_crosscore_int_send (int core_id , uint32_t reason_mask )
112+ static void ESP_SYSTEM_IRAM_ATTR esp_crosscore_int_send (int core_id , uint32_t reason_mask )
109113{
110114 assert (core_id < CONFIG_FREERTOS_NUMBER_OF_CORES );
111115 //Mark the reason we interrupt the other CPU
@@ -116,28 +120,28 @@ static void IRAM_ATTR esp_crosscore_int_send(int core_id, uint32_t reason_mask)
116120 crosscore_int_ll_trigger_interrupt (core_id );
117121}
118122
119- void IRAM_ATTR esp_crosscore_int_send_yield (int core_id )
123+ void ESP_SYSTEM_IRAM_ATTR esp_crosscore_int_send_yield (int core_id )
120124{
121125 esp_crosscore_int_send (core_id , REASON_YIELD );
122126}
123127
124- void IRAM_ATTR esp_crosscore_int_send_freq_switch (int core_id )
128+ void ESP_SYSTEM_IRAM_ATTR esp_crosscore_int_send_freq_switch (int core_id )
125129{
126130 esp_crosscore_int_send (core_id , REASON_FREQ_SWITCH );
127131}
128132
129- void IRAM_ATTR esp_crosscore_int_send_gdb_call (int core_id )
133+ void ESP_SYSTEM_IRAM_ATTR esp_crosscore_int_send_gdb_call (int core_id )
130134{
131135 esp_crosscore_int_send (core_id , REASON_GDB_CALL );
132136}
133137
134- void IRAM_ATTR esp_crosscore_int_send_print_backtrace (int core_id )
138+ void ESP_SYSTEM_IRAM_ATTR esp_crosscore_int_send_print_backtrace (int core_id )
135139{
136140 esp_crosscore_int_send (core_id , REASON_PRINT_BACKTRACE );
137141}
138142
139143#if CONFIG_ESP_TASK_WDT_EN
140- void IRAM_ATTR esp_crosscore_int_send_twdt_abort (int core_id )
144+ void ESP_SYSTEM_IRAM_ATTR esp_crosscore_int_send_twdt_abort (int core_id )
141145{
142146 esp_crosscore_int_send (core_id , REASON_TWDT_ABORT );
143147}
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