|
| 1 | +/* |
| 2 | + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +#include <assert.h> |
| 8 | +#include <sys/errno.h> |
| 9 | +#include "esp_elf.h" |
| 10 | +#include "esp_log.h" |
| 11 | +#include "private/elf_platform.h" |
| 12 | + |
| 13 | +/** @brief RISC-V relocations defined by the ABIs */ |
| 14 | + |
| 15 | +#define R_RISCV_NONE 0 |
| 16 | +#define R_RISCV_32 1 |
| 17 | +#define R_RISCV_64 2 |
| 18 | +#define R_RISCV_RELATIVE 3 |
| 19 | +#define R_RISCV_COPY 4 |
| 20 | +#define R_RISCV_JUMP_SLOT 5 |
| 21 | +#define R_RISCV_TLS_DTPMOD32 6 |
| 22 | +#define R_RISCV_TLS_DTPMOD64 7 |
| 23 | +#define R_RISCV_TLS_DTPREL32 8 |
| 24 | +#define R_RISCV_TLS_DTPREL64 9 |
| 25 | +#define R_RISCV_TLS_TPREL32 10 |
| 26 | +#define R_RISCV_TLS_TPREL64 11 |
| 27 | +#define R_RISCV_TLS_DESC 12 |
| 28 | +#define R_RISCV_BRANCH 16 |
| 29 | +#define R_RISCV_JAL 17 |
| 30 | +#define R_RISCV_CALL 18 |
| 31 | +#define R_RISCV_CALL_PLT 19 |
| 32 | +#define R_RISCV_GOT_HI20 20 |
| 33 | +#define R_RISCV_TLS_GOT_HI20 21 |
| 34 | +#define R_RISCV_TLS_GD_HI20 22 |
| 35 | +#define R_RISCV_PCREL_HI20 23 |
| 36 | +#define R_RISCV_PCREL_LO12_I 24 |
| 37 | +#define R_RISCV_PCREL_LO12_S 25 |
| 38 | +#define R_RISCV_HI20 26 |
| 39 | +#define R_RISCV_LO12_I 27 |
| 40 | +#define R_RISCV_LO12_S 28 |
| 41 | +#define R_RISCV_TPREL_HI20 29 |
| 42 | +#define R_RISCV_TPREL_LO12_I 30 |
| 43 | +#define R_RISCV_TPREL_LO12_S 31 |
| 44 | +#define R_RISCV_TPREL_ADD 32 |
| 45 | +#define R_RISCV_ADD8 33 |
| 46 | +#define R_RISCV_ADD16 34 |
| 47 | +#define R_RISCV_ADD32 35 |
| 48 | +#define R_RISCV_ADD64 36 |
| 49 | +#define R_RISCV_SUB8 37 |
| 50 | +#define R_RISCV_SUB16 38 |
| 51 | +#define R_RISCV_SUB32 39 |
| 52 | +#define R_RISCV_SUB64 40 |
| 53 | +#define R_RISCV_GNU_VTINHERIT 41 |
| 54 | +#define R_RISCV_GNU_VTENTRY 42 |
| 55 | +#define R_RISCV_ALIGN 43 |
| 56 | +#define R_RISCV_RVC_BRANCH 44 |
| 57 | +#define R_RISCV_RVC_JUMP 45 |
| 58 | +#define R_RISCV_RVC_LUI 46 |
| 59 | +#define R_RISCV_RELAX 51 |
| 60 | +#define R_RISCV_SUB6 52 |
| 61 | +#define R_RISCV_SET6 53 |
| 62 | +#define R_RISCV_SET8 54 |
| 63 | +#define R_RISCV_SET16 55 |
| 64 | +#define R_RISCV_SET32 56 |
| 65 | +#define R_RISCV_32_PCREL 57 |
| 66 | +#define R_RISCV_IRELATIVE 58 |
| 67 | +#define R_RISCV_PLT32 59 |
| 68 | + |
| 69 | +static const char *TAG = "elf_arch"; |
| 70 | + |
| 71 | +/** |
| 72 | + * @brief Relocates target architecture symbol of ELF |
| 73 | + * |
| 74 | + * @param elf - ELF object pointer |
| 75 | + * @param rela - Relocated symbol data |
| 76 | + * @param sym - ELF symbol table |
| 77 | + * @param addr - Jumping target address |
| 78 | + * |
| 79 | + * @return ESP_OK if success or other if failed. |
| 80 | + */ |
| 81 | +int esp_elf_arch_relocate(esp_elf_t *elf, const elf32_rela_t *rela, |
| 82 | + const elf32_sym_t *sym, uint32_t addr) |
| 83 | +{ |
| 84 | + uint32_t *where; |
| 85 | + |
| 86 | + assert(elf && rela); |
| 87 | + |
| 88 | + where = (uint32_t *)((uint8_t *)elf->psegment + rela->offset + elf->svaddr); |
| 89 | + ESP_LOGD(TAG, "where=%p addr=0x%x offset=0x%x", |
| 90 | + where, (int)elf->psegment, (int)rela->offset); |
| 91 | + |
| 92 | + /* Do relocation based on relocation type */ |
| 93 | + |
| 94 | + switch (ELF_R_TYPE(rela->info)) { |
| 95 | + case R_RISCV_NONE: |
| 96 | + break; |
| 97 | + case R_RISCV_32: |
| 98 | + *where = addr + rela->addend; |
| 99 | + break; |
| 100 | + case R_RISCV_RELATIVE: |
| 101 | + *where = (Elf32_Addr)((uint8_t *)elf->psegment - elf->svaddr + rela->addend); |
| 102 | + break; |
| 103 | + case R_RISCV_JUMP_SLOT: |
| 104 | + *where = addr; |
| 105 | + break; |
| 106 | + default: |
| 107 | + ESP_LOGE(TAG, "info=%d is not supported\n", ELF_R_TYPE(rela->info)); |
| 108 | + return -EINVAL; |
| 109 | + } |
| 110 | + |
| 111 | + return 0; |
| 112 | +} |
0 commit comments