update esp32c5 stubs (#232)

* update esp32c5 stubs

* fix lint

Author: brianignacio5

src/targets/esp32c5.ts

@@ -14,18 +14,22 @@ export class ESP32C5ROM extends ESP32C6ROM {
 
   public EFUSE_RD_REG_BASE = this.EFUSE_BASE + 0x030; // BLOCK0 read base address
 
+  public EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG = this.EFUSE_BASE + 0x34;
+  public EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT = 10;
+  public FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY = 2;
+
   public EFUSE_PURPOSE_KEY0_REG = this.EFUSE_BASE + 0x34;
-  public EFUSE_PURPOSE_KEY0_SHIFT = 24;
+  public EFUSE_PURPOSE_KEY0_SHIFT = 22;
   public EFUSE_PURPOSE_KEY1_REG = this.EFUSE_BASE + 0x34;
-  public EFUSE_PURPOSE_KEY1_SHIFT = 28;
+  public EFUSE_PURPOSE_KEY1_SHIFT = 27;
   public EFUSE_PURPOSE_KEY2_REG = this.EFUSE_BASE + 0x38;
   public EFUSE_PURPOSE_KEY2_SHIFT = 0;
   public EFUSE_PURPOSE_KEY3_REG = this.EFUSE_BASE + 0x38;
-  public EFUSE_PURPOSE_KEY3_SHIFT = 4;
+  public EFUSE_PURPOSE_KEY3_SHIFT = 5;
   public EFUSE_PURPOSE_KEY4_REG = this.EFUSE_BASE + 0x38;
-  public EFUSE_PURPOSE_KEY4_SHIFT = 8;
+  public EFUSE_PURPOSE_KEY4_SHIFT = 10;
   public EFUSE_PURPOSE_KEY5_REG = this.EFUSE_BASE + 0x38;
-  public EFUSE_PURPOSE_KEY5_SHIFT = 12;
+  public EFUSE_PURPOSE_KEY5_SHIFT = 15;
 
   public EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG = this.EFUSE_RD_REG_BASE;
   public EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT = 1 << 20;
@@ -37,9 +41,9 @@ export class ESP32C5ROM extends ESP32C6ROM {
   public EFUSE_SECURE_BOOT_EN_MASK = 1 << 20;
 
   public IROM_MAP_START = 0x42000000;
-  public IROM_MAP_END = 0x42800000;
-  public DROM_MAP_START = 0x42800000;
-  public DROM_MAP_END = 0x43000000;
+  public IROM_MAP_END = 0x44000000;
+  public DROM_MAP_START = 0x42000000;
+  public DROM_MAP_END = 0x44000000;
 
   public PCR_SYSCLK_CONF_REG = 0x60096110;
   public PCR_SYSCLK_XTAL_FREQ_V = 0x7f << 24;
@@ -60,12 +64,12 @@ export class ESP32C5ROM extends ESP32C6ROM {
 
   public MEMORY_MAP: MemoryMapEntry[] = [
     [0x00000000, 0x00010000, "PADDING"],
-    [0x42800000, 0x43000000, "DROM"],
+    [0x42000000, 0x44000000, "DROM"],
     [0x40800000, 0x40860000, "DRAM"],
     [0x40800000, 0x40860000, "BYTE_ACCESSIBLE"],
     [0x4003a000, 0x40040000, "DROM_MASK"],
     [0x40000000, 0x4003a000, "IROM_MASK"],
-    [0x42000000, 0x42800000, "IROM"],
+    [0x42000000, 0x44000000, "IROM"],
     [0x40800000, 0x40860000, "IRAM"],
     [0x50000000, 0x50004000, "RTC_IRAM"],
     [0x50000000, 0x50004000, "RTC_DRAM"],
@@ -75,11 +79,10 @@ export class ESP32C5ROM extends ESP32C6ROM {
   UF2_FAMILY_ID = 0xf71c0343;
 
   EFUSE_MAX_KEY = 5;
-  KEY_PURPOSES = {
+  PURPOSE_VAL_XTS_AES128_KEY = 4;
+  KEY_PURPOSES: { [key: number]: string } = {
     0: "USER/EMPTY",
     1: "ECDSA_KEY",
-    2: "XTS_AES_256_KEY_1",
-    3: "XTS_AES_256_KEY_2",
     4: "XTS_AES_128_KEY",
     5: "HMAC_DOWN_ALL",
     6: "HMAC_DOWN_JTAG",
@@ -89,6 +92,10 @@ export class ESP32C5ROM extends ESP32C6ROM {
     10: "SECURE_BOOT_DIGEST1",
     11: "SECURE_BOOT_DIGEST2",
     12: "KM_INIT_KEY",
+    15: "XTS_AES_128_PSRAM_KEY",
+    16: "ECDSA_KEY_P192",
+    17: "ECDSA_KEY_P384_L",
+    18: "ECDSA_KEY_P384_H",
   };
 
   public async getPkgVersion(loader: ESPLoader): Promise<number> {
@@ -120,7 +127,7 @@ export class ESP32C5ROM extends ESP32C6ROM {
   }
 
   public async getChipFeatures(loader: ESPLoader): Promise<string[]> {
-    return ["Wi-Fi 6 (dual-band)", "BT 5 (LE)"];
+    return ["Wi-Fi 6 (dual-band)", "BT 5 (LE)", "IEEE802.15.4", "Single Core + LP Core", "240MHz"];
   }
 
   public async getCrystalFreq(loader: ESPLoader): Promise<number> {
@@ -147,4 +154,100 @@ export class ESP32C5ROM extends ESP32C6ROM {
       ((await loader.readReg(this.PCR_SYSCLK_CONF_REG)) & this.PCR_SYSCLK_XTAL_FREQ_V) >> this.PCR_SYSCLK_XTAL_FREQ_S
     );
   }
+
+  public async getKeyBlockPurpose(loader: ESPLoader, keyBlock: number): Promise<number> {
+    if (keyBlock < 0 || keyBlock > this.EFUSE_MAX_KEY) {
+      throw new Error(`Valid key block numbers must be in range 0-${this.EFUSE_MAX_KEY}`);
+    }
+
+    const regShiftDictionary = [
+      [this.EFUSE_PURPOSE_KEY0_REG, this.EFUSE_PURPOSE_KEY0_SHIFT],
+      [this.EFUSE_PURPOSE_KEY1_REG, this.EFUSE_PURPOSE_KEY1_SHIFT],
+      [this.EFUSE_PURPOSE_KEY2_REG, this.EFUSE_PURPOSE_KEY2_SHIFT],
+      [this.EFUSE_PURPOSE_KEY3_REG, this.EFUSE_PURPOSE_KEY3_SHIFT],
+      [this.EFUSE_PURPOSE_KEY4_REG, this.EFUSE_PURPOSE_KEY4_SHIFT],
+      [this.EFUSE_PURPOSE_KEY5_REG, this.EFUSE_PURPOSE_KEY5_SHIFT],
+    ];
+    const [reg, shift] = regShiftDictionary[keyBlock];
+
+    const registerValue = await loader.readReg(reg);
+    return (registerValue >> shift) & 0x1f;
+  }
+
+  public async isFlashEncryptionKeyValid(loader: ESPLoader): Promise<boolean> {
+    // Need to see an AES-128 key
+    const purposes = [];
+    for (let i = 0; i <= this.EFUSE_MAX_KEY; i++) {
+      const purpose = await this.getKeyBlockPurpose(loader, i);
+      purposes.push(purpose);
+    }
+
+    if (purposes.some((p) => p === this.PURPOSE_VAL_XTS_AES128_KEY)) {
+      return true;
+    }
+
+    const registerValue = await loader.readReg(this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG);
+    return (
+      ((registerValue >> this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT) & this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY) !== 0
+    );
+  }
+
+  public checkSpiConnection(loader: ESPLoader, spiConnection: number[]): void {
+    if (!spiConnection.every((pin) => pin >= 0 && pin <= 28)) {
+      throw new Error("SPI Pin numbers must be in the range 0-28.");
+    }
+    if (spiConnection.some((pin) => pin === 13 || pin === 14)) {
+      loader.info(
+        "GPIO pins 13 and 14 are used by USB-Serial/JTAG, " + "consider using other pins for SPI flash connection.",
+      );
+    }
+  }
+
+  public async usesUsbJtagSerial(loader: ESPLoader): Promise<boolean> {
+    const uartBufNoAddr = this.UARTDEV_BUF_NO;
+    const uartNo = (await loader.readReg(uartBufNoAddr)) & 0xff;
+    // ESP32-C5 uses value 3 for USB-JTAG/Serial (similar to ESP32-S3/H2)
+    return uartNo === 3;
+  }
+
+  public async watchdogReset(loader: ESPLoader): Promise<void> {
+    // Watchdog reset disabled in parent (ESP32-C6) ROM, re-enable it
+    // This should call the ESP32C3ROM.watchdogReset method
+    // Note: This is a placeholder - the actual implementation would need
+    // the watchdog registers from ESP32C3ROM
+    loader.info("Hard resetting with a watchdog...");
+    // TODO: Implement watchdog reset using ESP32C3ROM registers
+    throw new Error("watchdogReset not yet implemented for ESP32-C5");
+  }
+
+  public async changeBaud(loader: ESPLoader): Promise<void> {
+    // Note: secure_download_mode check would need to be added to ESPLoader if needed
+    // if (loader.secureDownloadMode) {
+    //   loader.info(
+    //     "Baud rate change is not supported in secure download mode. " + "Keeping 115200 baud.",
+    //   );
+    //   return;
+    // }
+    if (!loader.IS_STUB) {
+      const crystalFreqRomExpect = await this.getCrystalFreqRomExpect(loader);
+      const crystalFreqDetect = await this.getCrystalFreq(loader);
+      loader.info(`ROM expects crystal freq: ${crystalFreqRomExpect} MHz, ` + `detected ${crystalFreqDetect} MHz.`);
+      // If detect the XTAL is 48MHz, but the ROM code expects it to be 40MHz
+      if (crystalFreqDetect === 48 && crystalFreqRomExpect === 40) {
+        loader.info(
+          "Crystal frequency mismatch detected. " +
+            "Baud rate adjustment may be needed but is not fully implemented in this version.",
+        );
+      }
+      // If detect the XTAL is 40MHz, but the ROM code expects it to be 48MHz
+      else if (crystalFreqDetect === 40 && crystalFreqRomExpect === 48) {
+        loader.info(
+          "Crystal frequency mismatch detected. " +
+            "Baud rate adjustment may be needed but is not fully implemented in this version.",
+        );
+      }
+    }
+    // Call the standard changeBaud method
+    await loader.changeBaud();
+  }
 }