Clarify behavior on how Load Reservation handles sizes.

[mininny]

The Load Reservation / Conditional Store instructions (SCD/SCW/LRD/LRW) are partially implemented as they don't store the size of the load reservation.

As per the specification, Load Reservations are composed of both an address and a size, the size being either 4-byte (for LRW) or 8-byte (for LRD).

The corresponding SCD/SCW instructions only successfully write to memory if all the bytes being written are contained within the (address, size) of the latest reservation.

For example, a LRW followed by a SCD should always fail, even if the addresses match as the reservation size of 4 bytes can't contain the double word the SCD instruction is attempting to write.

Conversely, a LRD followed by a SCW might succeed even if the addresses aren't the same as the word might be a subset of the double-word.

While the most likely is that compilers will generate code with matching pairs of either LRW + SCW or LRD + SCW, it's possible optimizations might reduce memory access by having LRD + SCW for example, and it seems risky to make such assumptions that exclude perfectly correct programs.

Regardless, as long multiple threads aren't supported and the program being executed is correct, the impact should at most be halting the execution or non-termination -- correct programs should either retry on SC failure, or throw an exception.