@@ -87,9 +87,45 @@ module rgmii_phy_if #
8787 // 2'b10: 1G
8888 // 2'b01: 100M
8989 // 2'b00: 10M
90- input wire [1 :0 ] speed
90+ input wire [1 :0 ] speed,
91+
92+ // Debug _signal
93+ output rgmii_rxc_debug,
94+ output [3 :0 ] rgmii_rd_debug,
95+ output rgmii_rx_ctl_debug,
96+ output rgmii_txc_debug
97+ output [3 :0 ] rgmii_td_debug,
98+ output rgmii_tx_ctl_debug,
99+
100+ output wire gmii_rx_clk_debug,
101+ output wire [7 :0 ] gmii_rxd_debug,
102+ output wire gmii_rx_dv_debug,
103+ output wire gmii_rx_er_debug,
104+
105+ output wire gmii_gtx_clk_debug,
106+ output wire [7 :0 ] gmii_txd_debug,
107+ output wire gmii_tx_en_debug,
108+ output wire gmii_tx_er_debug
109+
110+
91111);
92112
113+ assign rgmii_rxc_debug = rgmii_rxc;
114+ assign rgmii_rd_debug = rgmii_rd;
115+ assign rgmii_rx_ctl_debug = rgmii_rx_ctl;
116+ assign rgmii_txc_debug = rgmii_txc;
117+ assign rgmii_td_debug = rgmii_td;
118+ assign rgmii_tx_ctl_debug = rgmii_tx_ctl;
119+
120+ assign gmii_rx_clk_debug = gmii_rx_clk;
121+ assign gmii_rxd_debug = gmii_rxd;
122+ assign gmii_rx_dv_debug= gmii_rx_dv;
123+ assign gmii_rx_er_debug= gmii_rx_er;
124+
125+ assign gmii_gtx_clk_debug= gmii_gtx_clk;
126+ assign gmii_txd_debug= gmii_txd;
127+ assign gmii_tx_en_debug= gmii_tx_en;
128+ assign gmii_tx_er_debug= gmii_tx_er;
93129wire clk;
94130
95131// receive
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