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kavitha-etlkavitha-etl
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added debug signals
1 parent a25c587 commit f85afb9

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3 files changed

+339
-5
lines changed

3 files changed

+339
-5
lines changed

‎rtl/axis_gmii_rx.v‎

Lines changed: 118 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,60 @@ module axis_gmii_rx #
7878
*/
7979
output wire start_packet,
8080
output wire error_bad_frame,
81-
output wire error_bad_fcs
81+
output wire error_bad_fcs,
82+
83+
// debug
84+
output [2:0] state_reg_out,
85+
output [2:0] state_next_out,
86+
output reset_crc_out,
87+
output update_crc_out,
88+
89+
output mii_odd_out,
90+
output in_frame_out,
91+
92+
output [DATA_WIDTH-1:0] gmii_rxd_d0_out,
93+
output [DATA_WIDTH-1:0] gmii_rxd_d1_out,
94+
output [DATA_WIDTH-1:0] gmii_rxd_d2_out,
95+
output [DATA_WIDTH-1:0] gmii_rxd_d3_out,
96+
output [DATA_WIDTH-1:0] gmii_rxd_d4_out,
97+
98+
output gmii_rx_dv_d0_out,
99+
output gmii_rx_dv_d1_out,
100+
output gmii_rx_dv_d2_out,
101+
output gmii_rx_dv_d3_out,
102+
output gmii_rx_dv_d4_out,
103+
104+
output gmii_rx_er_d0_out,
105+
output gmii_rx_er_d1_out,
106+
output gmii_rx_er_d2_out,
107+
output gmii_rx_er_d3_out,
108+
output gmii_rx_er_d4_out,
109+
110+
output [DATA_WIDTH-1:0] m_axis_tdata_reg_out,
111+
output [DATA_WIDTH-1:0] m_axis_tdata_next_out,
112+
output m_axis_tvalid_reg_out,
113+
output m_axis_tvalid_next_out,
114+
output m_axis_tlast_reg_out,
115+
output m_axis_tlast_next_out,
116+
output m_axis_tuser_reg_out,
117+
output m_axis_tuser_next_out,
118+
119+
output start_packet_int_reg_out,
120+
output start_packet_reg_out,
121+
output error_bad_frame_reg_out,
122+
output error_bad_frame_next_out,
123+
output error_bad_fcs_reg_out,
124+
output error_bad_fcs_next_out,
125+
126+
output [PTP_TS_WIDTH-1:0] ptp_ts_reg_out,
127+
128+
output [31:0] crc_state_out,
129+
output [31:0] crc_next_out,
130+
131+
output clk_enable_out,
132+
output mii_select_out,
133+
134+
output cfg_rx_enable_out
82135
);
83136

84137
// bus width assertions
@@ -140,6 +193,70 @@ reg [PTP_TS_WIDTH-1:0] ptp_ts_reg = 0;
140193
reg [31:0] crc_state = 32'hFFFFFFFF;
141194
wire [31:0] crc_next;
142195

196+
197+
198+
// debug out
199+
200+
201+
assign state_reg_out = state_reg;
202+
assign state_next_out = state_next;
203+
assign reset_crc_out = reset_crc;
204+
assign update_crc_out = update_crc;
205+
206+
assign mii_odd_out = mii_odd ;
207+
assign in_frame_out = in_frame;
208+
209+
assign gmii_rxd_d0_out = gmii_rxd_d0;
210+
assign gmii_rxd_d1_out = gmii_rxd_d1;
211+
assign gmii_rxd_d2_out = gmii_rxd_d2;
212+
assign gmii_rxd_d3_out = gmii_rxd_d3;
213+
assign gmii_rxd_d4_out = gmii_rxd_d4;
214+
215+
assign gmii_rx_dv_d0_out = gmii_rx_dv_d0;
216+
assign gmii_rx_dv_d1_out = gmii_rx_dv_d1;
217+
assign gmii_rx_dv_d2_out = gmii_rx_dv_d2;
218+
assign gmii_rx_dv_d3_out = gmii_rx_dv_d3;
219+
assign gmii_rx_dv_d4_out = gmii_rx_dv_d4;
220+
221+
assign gmii_rx_er_d0_out = gmii_rx_er_d0;
222+
assign gmii_rx_er_d1_out = gmii_rx_er_d1;
223+
assign gmii_rx_er_d2_out = gmii_rx_er_d2;
224+
assign gmii_rx_er_d3_out = gmii_rx_er_d3;
225+
assign gmii_rx_er_d4_out= gmii_rx_er_d4;
226+
227+
assign m_axis_tdata_reg_out = m_axis_tdata_reg;
228+
assign m_axis_tdata_next_out = m_axis_tdata_next;
229+
assign m_axis_tvalid_reg_out = m_axis_tvalid_reg;
230+
assign m_axis_tvalid_next_out = m_axis_tvalid_next;
231+
assign m_axis_tlast_reg_out = m_axis_tlast_reg;
232+
assign m_axis_tlast_next_out = m_axis_tlast_next;
233+
assign m_axis_tuser_reg_out = m_axis_tuser_reg;
234+
assign m_axis_tuser_next_out = m_axis_tuser_next;
235+
236+
assign start_packet_int_reg_out = start_packet_int_reg;
237+
assign start_packet_reg_out = start_packet_reg;
238+
assign error_bad_frame_reg_out = error_bad_frame_reg;
239+
assign error_bad_frame_next_out = error_bad_frame_next;
240+
assign error_bad_fcs_reg_out = error_bad_fcs_reg;
241+
assign error_bad_fcs_next_out = error_bad_fcs_next;
242+
243+
assign ptp_ts_reg_out = ptp_ts_reg;
244+
245+
assign crc_state_out = crc_state;
246+
assign crc_next_out = crc_next;
247+
248+
assign clk_enable_out = clk_enable;
249+
assign mii_select_out = mii_select;
250+
251+
/*
252+
* Configuration
253+
*/
254+
output cfg_rx_enable_out = cfg_rx_enable;
255+
256+
257+
258+
259+
143260
assign m_axis_tdata = m_axis_tdata_reg;
144261
assign m_axis_tvalid = m_axis_tvalid_reg;
145262
assign m_axis_tlast = m_axis_tlast_reg;

‎rtl/eth_mac_1g.v‎

Lines changed: 103 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -185,7 +185,61 @@ module eth_mac_1g #
185185
input wire [15:0] cfg_rx_lfc_opcode,
186186
input wire cfg_rx_lfc_en,
187187
input wire [15:0] cfg_rx_pfc_opcode,
188-
input wire cfg_rx_pfc_en
188+
input wire cfg_rx_pfc_en,
189+
190+
191+
// debug
192+
output [2:0] state_reg_out,
193+
output [2:0] state_next_out,
194+
output reset_crc_out,
195+
output update_crc_out,
196+
197+
output mii_odd_out,
198+
output in_frame_out,
199+
200+
output [DATA_WIDTH-1:0] gmii_rxd_d0_out,
201+
output [DATA_WIDTH-1:0] gmii_rxd_d1_out,
202+
output [DATA_WIDTH-1:0] gmii_rxd_d2_out,
203+
output [DATA_WIDTH-1:0] gmii_rxd_d3_out,
204+
output [DATA_WIDTH-1:0] gmii_rxd_d4_out,
205+
206+
output gmii_rx_dv_d0_out,
207+
output gmii_rx_dv_d1_out,
208+
output gmii_rx_dv_d2_out,
209+
output gmii_rx_dv_d3_out,
210+
output gmii_rx_dv_d4_out,
211+
212+
output gmii_rx_er_d0_out,
213+
output gmii_rx_er_d1_out,
214+
output gmii_rx_er_d2_out,
215+
output gmii_rx_er_d3_out,
216+
output gmii_rx_er_d4_out,
217+
218+
output [DATA_WIDTH-1:0] m_axis_tdata_reg_out,
219+
output [DATA_WIDTH-1:0] m_axis_tdata_next_out,
220+
output m_axis_tvalid_reg_out,
221+
output m_axis_tvalid_next_out,
222+
output m_axis_tlast_reg_out,
223+
output m_axis_tlast_next_out,
224+
output m_axis_tuser_reg_out,
225+
output m_axis_tuser_next_out,
226+
227+
output start_packet_int_reg_out,
228+
output start_packet_reg_out,
229+
output error_bad_frame_reg_out,
230+
output error_bad_frame_next_out,
231+
output error_bad_fcs_reg_out,
232+
output error_bad_fcs_next_out,
233+
234+
output [PTP_TS_WIDTH-1:0] ptp_ts_reg_out,
235+
236+
output [31:0] crc_state_out,
237+
output [31:0] crc_next_out,
238+
239+
output clk_enable_out,
240+
output mii_select_out,
241+
242+
output cfg_rx_enable_out
189243
);
190244

191245
localparam MAC_CTRL_ENABLE = PAUSE_ENABLE || PFC_ENABLE;
@@ -224,7 +278,54 @@ axis_gmii_rx_inst (
224278
.cfg_rx_enable(cfg_rx_enable),
225279
.start_packet(rx_start_packet),
226280
.error_bad_frame(rx_error_bad_frame),
227-
.error_bad_fcs(rx_error_bad_fcs)
281+
.error_bad_fcs(rx_error_bad_fcs),
282+
.state_reg_out(state_reg_out),
283+
.state_next_out(state_next_out),
284+
.reset_crc_out(reset_crc_out),
285+
.update_crc_out(update_crc_out),
286+
287+
.mii_odd_out(mii_odd_out),
288+
.in_frame_out(in_frame_out),
289+
290+
.gmii_rxd_d0_out(gmii_rxd_d0_out),
291+
.gmii_rxd_d1_out(gmii_rxd_d1_out),
292+
.gmii_rxd_d2_out(gmii_rxd_d2_out),
293+
.gmii_rxd_d3_out(gmii_rxd_d3_out),
294+
.gmii_rxd_d4_out(gmii_rxd_d4_out),
295+
296+
.gmii_rx_dv_d0_out(gmii_rx_dv_d0_out),
297+
.gmii_rx_dv_d1_out(gmii_rx_dv_d1_out),
298+
.gmii_rx_dv_d2_out(gmii_rx_dv_d2_out),
299+
.gmii_rx_dv_d3_out(gmii_rx_dv_d3_out),
300+
.gmii_rx_dv_d4_out(gmii_rx_dv_d4_out),
301+
302+
.gmii_rx_er_d0_out(gmii_rx_er_d0_out),
303+
.gmii_rx_er_d1_out(gmii_rx_er_d1_out),
304+
.gmii_rx_er_d2_out(gmii_rx_er_d2_out),
305+
.gmii_rx_er_d3_out(gmii_rx_er_d3_out),
306+
.gmii_rx_er_d4_out(gmii_rx_er_d4_out),
307+
308+
.m_axis_tdata_reg_out(m_axis_tdata_reg_out),
309+
.m_axis_tdata_next_out(m_axis_tdata_next_out),
310+
.m_axis_tvalid_reg_out(m_axis_tvalid_reg_out),
311+
.m_axis_tvalid_next_out(m_axis_tvalid_next_out),
312+
.m_axis_tlast_reg_out(m_axis_tlast_reg_out),
313+
.m_axis_tlast_next_out(m_axis_tlast_next_out),
314+
.m_axis_tuser_reg_out(m_axis_tuser_reg_out),
315+
.m_axis_tuser_next_out(m_axis_tuser_next_out),
316+
317+
.start_packet_int_reg_out(start_packet_int_reg_out),
318+
.start_packet_reg_out(start_packet_reg_out),
319+
.error_bad_frame_reg_out(error_bad_frame_reg_out),
320+
.error_bad_frame_next_out(error_bad_frame_next_out),
321+
.error_bad_fcs_reg_out(error_bad_fcs_reg_out),
322+
.error_bad_fcs_next_out(error_bad_fcs_next_out),
323+
.ptp_ts_reg_out(ptp_ts_reg_out),
324+
.crc_state_out(crc_state_out),
325+
.crc_next_out(crc_next_out),
326+
.clk_enable_out(clk_enable_out),
327+
.mii_select_out(mii_select_out),
328+
.cfg_rx_enable_out(cfg_rx_enable_out)
228329
);
229330

230331
axis_gmii_tx #(

‎rtl/eth_mac_1g_gmii.v‎

Lines changed: 118 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -79,6 +79,67 @@ module eth_mac_1g_gmii #
7979
input wire [7:0] gmii_rxd,
8080
input wire gmii_rx_dv,
8181
input wire gmii_rx_er,
82+
// debug output
83+
output wire [7:0] gmii_rxd_out,
84+
output wire gmii_rx_dv_out,
85+
output wire gmii_rx_er_out,
86+
output [7:0] mac_gmii_rxd_out,
87+
output mac_gmii_rx_dv_out,
88+
output mac_gmii_rx_er_out,
89+
90+
91+
output [2:0] state_reg_out,
92+
output [2:0] state_next_out,
93+
output reset_crc_out,
94+
output update_crc_out,
95+
96+
output mii_odd_out,
97+
output in_frame_out,
98+
99+
output [DATA_WIDTH-1:0] gmii_rxd_d0_out,
100+
output [DATA_WIDTH-1:0] gmii_rxd_d1_out,
101+
output [DATA_WIDTH-1:0] gmii_rxd_d2_out,
102+
output [DATA_WIDTH-1:0] gmii_rxd_d3_out,
103+
output [DATA_WIDTH-1:0] gmii_rxd_d4_out,
104+
105+
output gmii_rx_dv_d0_out,
106+
output gmii_rx_dv_d1_out,
107+
output gmii_rx_dv_d2_out,
108+
output gmii_rx_dv_d3_out,
109+
output gmii_rx_dv_d4_out,
110+
111+
output gmii_rx_er_d0_out,
112+
output gmii_rx_er_d1_out,
113+
output gmii_rx_er_d2_out,
114+
output gmii_rx_er_d3_out,
115+
output gmii_rx_er_d4_out,
116+
117+
output [DATA_WIDTH-1:0] m_axis_tdata_reg_out,
118+
output [DATA_WIDTH-1:0] m_axis_tdata_next_out,
119+
output m_axis_tvalid_reg_out,
120+
output m_axis_tvalid_next_out,
121+
output m_axis_tlast_reg_out,
122+
output m_axis_tlast_next_out,
123+
output m_axis_tuser_reg_out,
124+
output m_axis_tuser_next_out,
125+
126+
output start_packet_int_reg_out,
127+
output start_packet_reg_out,
128+
output error_bad_frame_reg_out,
129+
output error_bad_frame_next_out,
130+
output error_bad_fcs_reg_out,
131+
output error_bad_fcs_next_out,
132+
133+
output [PTP_TS_WIDTH-1:0] ptp_ts_reg_out,
134+
135+
output [31:0] crc_state_out,
136+
output [31:0] crc_next_out,
137+
138+
output clk_enable_out,
139+
output mii_select_out,
140+
141+
output cfg_rx_enable_out,
142+
82143
input wire mii_tx_clk,
83144
output wire gmii_tx_clk,
84145
output wire [7:0] gmii_txd,
@@ -108,6 +169,13 @@ wire [7:0] mac_gmii_txd;
108169
wire mac_gmii_tx_en;
109170
wire mac_gmii_tx_er;
110171

172+
173+
assign gmii_rxd_out =gmii_rxd;
174+
assign gmii_rx_dv_out=gmii_rx_dv;
175+
assign gmii_rx_er_out=gmii_rx_er;
176+
assign mac_gmii_rxd_out = mac_gmii_rxd;
177+
assign mac_gmii_rx_dv_out = mac_gmii_rx_dv;
178+
assign mac_gmii_rx_er_out = mac_gmii_rx_er;
111179
reg [1:0] speed_reg = 2'b10;
112180
reg mii_select_reg = 1'b0;
113181

@@ -212,7 +280,8 @@ gmii_phy_if_inst (
212280
.phy_gmii_tx_en(gmii_tx_en),
213281
.phy_gmii_tx_er(gmii_tx_er),
214282

215-
.mii_select(mii_select_reg)
283+
.mii_select(mii_select_reg),
284+
216285
);
217286

218287
eth_mac_1g #(
@@ -248,7 +317,54 @@ eth_mac_1g_inst (
248317
.rx_error_bad_fcs(rx_error_bad_fcs),
249318
.cfg_ifg(cfg_ifg),
250319
.cfg_tx_enable(cfg_tx_enable),
251-
.cfg_rx_enable(cfg_rx_enable)
320+
.cfg_rx_enable(cfg_rx_enable),
321+
.state_reg_out(state_reg_out),
322+
.state_next_out(state_next_out),
323+
.reset_crc_out(reset_crc_out),
324+
.update_crc_out(update_crc_out),
325+
326+
.mii_odd_out(mii_odd_out),
327+
.in_frame_out(in_frame_out),
328+
329+
.gmii_rxd_d0_out(gmii_rxd_d0_out),
330+
.gmii_rxd_d1_out(gmii_rxd_d1_out),
331+
.gmii_rxd_d2_out(gmii_rxd_d2_out),
332+
.gmii_rxd_d3_out(gmii_rxd_d3_out),
333+
.gmii_rxd_d4_out(gmii_rxd_d4_out),
334+
335+
.gmii_rx_dv_d0_out(gmii_rx_dv_d0_out),
336+
.gmii_rx_dv_d1_out(gmii_rx_dv_d1_out),
337+
.gmii_rx_dv_d2_out(gmii_rx_dv_d2_out),
338+
.gmii_rx_dv_d3_out(gmii_rx_dv_d3_out),
339+
.gmii_rx_dv_d4_out(gmii_rx_dv_d4_out),
340+
341+
.gmii_rx_er_d0_out(gmii_rx_er_d0_out),
342+
.gmii_rx_er_d1_out(gmii_rx_er_d1_out),
343+
.gmii_rx_er_d2_out(gmii_rx_er_d2_out),
344+
.gmii_rx_er_d3_out(gmii_rx_er_d3_out),
345+
.gmii_rx_er_d4_out(gmii_rx_er_d4_out),
346+
347+
.m_axis_tdata_reg_out(m_axis_tdata_reg_out),
348+
.m_axis_tdata_next_out(m_axis_tdata_next_out),
349+
.m_axis_tvalid_reg_out(m_axis_tvalid_reg_out),
350+
.m_axis_tvalid_next_out(m_axis_tvalid_next_out),
351+
.m_axis_tlast_reg_out(m_axis_tlast_reg_out),
352+
.m_axis_tlast_next_out(m_axis_tlast_next_out),
353+
.m_axis_tuser_reg_out(m_axis_tuser_reg_out),
354+
.m_axis_tuser_next_out(m_axis_tuser_next_out),
355+
356+
.start_packet_int_reg_out(start_packet_int_reg_out),
357+
.start_packet_reg_out(start_packet_reg_out),
358+
.error_bad_frame_reg_out(error_bad_frame_reg_out),
359+
.error_bad_frame_next_out(error_bad_frame_next_out),
360+
.error_bad_fcs_reg_out(error_bad_fcs_reg_out),
361+
.error_bad_fcs_next_out(error_bad_fcs_next_out),
362+
.ptp_ts_reg_out(ptp_ts_reg_out),
363+
.crc_state_out(crc_state_out),
364+
.crc_next_out(crc_next_out),
365+
.clk_enable_out(clk_enable_out),
366+
.mii_select_out(mii_select_out),
367+
.cfg_rx_enable_out(cfg_rx_enable_out)
252368
);
253369

254370
endmodule

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