|
| 1 | +&zephyr_udc0 { |
| 2 | + cdc_acm_uart0: cdc_acm_uart0 { |
| 3 | + compatible = "zephyr,cdc-acm-uart"; |
| 4 | + status = "okay"; |
| 5 | + }; |
| 6 | +}; |
| 7 | + |
| 8 | +&flash0 { |
| 9 | + partitions { |
| 10 | + mcuboot: partition@0 { |
| 11 | + label = "mcuboot"; |
| 12 | + reg = <0x00000000 DT_SIZE_K(64)>; |
| 13 | + }; |
| 14 | + code_partition: partition@10000 { |
| 15 | + label = "image-0"; |
| 16 | + reg = <0x00010000 (DT_SIZE_M(1) - DT_SIZE_K(64))>; |
| 17 | + }; |
| 18 | + user_sketch: partition@100000 { |
| 19 | + label = "user_sketch"; |
| 20 | + reg = <0x00100000 (DT_SIZE_M(1))>; |
| 21 | + }; |
| 22 | + }; |
| 23 | +}; |
| 24 | + |
| 25 | +/ { |
| 26 | + zephyr,user { |
| 27 | + digital-pin-gpios = <&ioport1 5 GPIO_ACTIVE_HIGH>, |
| 28 | + <&ioport1 6 GPIO_ACTIVE_HIGH>, |
| 29 | + <&ioport1 11 GPIO_ACTIVE_HIGH>, |
| 30 | + <&ioport3 3 GPIO_ACTIVE_HIGH>, |
| 31 | + <&ioport4 1 GPIO_ACTIVE_HIGH>, |
| 32 | + <&ioport2 10 GPIO_ACTIVE_HIGH>, |
| 33 | + <&ioport6 1 GPIO_ACTIVE_HIGH>, |
| 34 | + <&ioport4 2 GPIO_ACTIVE_HIGH>, |
| 35 | + <&ioport9 0 GPIO_ACTIVE_HIGH>, |
| 36 | + <&ioport2 4 GPIO_ACTIVE_HIGH>, |
| 37 | + <&ioport3 15 GPIO_ACTIVE_HIGH>, |
| 38 | + <&ioport4 7 GPIO_ACTIVE_HIGH>, |
| 39 | + <&ioport4 8 GPIO_ACTIVE_HIGH>, |
| 40 | + <&ioport1 10 GPIO_ACTIVE_HIGH>, |
| 41 | + <&ioport6 2 GPIO_ACTIVE_HIGH>, |
| 42 | + |
| 43 | + <&ioport0 6 GPIO_ACTIVE_HIGH>, |
| 44 | + <&ioport0 5 GPIO_ACTIVE_HIGH>, |
| 45 | + <&ioport0 4 GPIO_ACTIVE_HIGH>, |
| 46 | + <&ioport0 2 GPIO_ACTIVE_HIGH>, |
| 47 | + <&ioport0 1 GPIO_ACTIVE_HIGH>, |
| 48 | + <&ioport0 15 GPIO_ACTIVE_HIGH>, |
| 49 | + <&ioport0 14 GPIO_ACTIVE_HIGH>, |
| 50 | + <&ioport0 0 GPIO_ACTIVE_HIGH>, |
| 51 | + |
| 52 | + <&ioport6 5 GPIO_ACTIVE_HIGH>, |
| 53 | + <&ioport6 8 GPIO_ACTIVE_HIGH>, |
| 54 | + <&ioport3 11 GPIO_ACTIVE_HIGH>, |
| 55 | + <&ioport6 0 GPIO_ACTIVE_HIGH>, |
| 56 | + |
| 57 | + <&ioport0 9 GPIO_ACTIVE_HIGH>, |
| 58 | + <&ioport4 9 GPIO_ACTIVE_HIGH>, |
| 59 | + <&ioport5 5 GPIO_ACTIVE_HIGH>, |
| 60 | + <&ioport7 6 GPIO_ACTIVE_HIGH>, |
| 61 | + <&ioport7 7 GPIO_ACTIVE_HIGH>, |
| 62 | + <&ioport7 8 GPIO_ACTIVE_HIGH>, |
| 63 | + <&ioport8 2 GPIO_ACTIVE_HIGH>, |
| 64 | + |
| 65 | + <&ioport1 7 GPIO_ACTIVE_HIGH>, // LEDR |
| 66 | + <&ioport4 0 GPIO_ACTIVE_HIGH>, |
| 67 | + <&ioport8 0 GPIO_ACTIVE_HIGH>; |
| 68 | + |
| 69 | + builtin-led-gpios = <&ioport1 7 GPIO_ACTIVE_LOW>, |
| 70 | + <&ioport4 0 GPIO_ACTIVE_LOW>, |
| 71 | + <&ioport8 0 GPIO_ACTIVE_LOW>; |
| 72 | + |
| 73 | + serials = <&cdc_acm_uart0>,<&sci9>; |
| 74 | + cdc-acm = <&cdc_acm_uart0>; |
| 75 | + i2cs = <&iic1>; |
| 76 | + spis = <&spi1>; |
| 77 | + }; |
| 78 | +}; |
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