Reland #705 [TLX] Skip InvalidBarrierOp insertion in Fixup on AMD (#722)

Summary:
This patch fixes the broken TLX unit test on AMD

third-party/triton/beta/triton:py_tlx_amd_test - test_tlx.py::test_wait_arrive_non_ws[1024]

Pull Request resolved: #722

Reviewed By: karthik-man

Differential Revision: D88494734

Pulled By: dshi7

fbshipit-source-id: 06890456c56c2384fe178751e7c404e3bea57e60

Author: dshi7

third_party/tlx/dialect/lib/Transforms/Fixup.cpp

@@ -119,6 +119,11 @@ class TritonTLXFixupPass : public impl::TritonTLXFixupBase<TritonTLXFixupPass> {
     return success();
   }
 
+  bool isAMD() const {
+    // target is set up as f"hip:{options.arch}"
+    return (target.getValue().find("hip:") == 0);
+  }
+
   void runOnOperation() override {
     ModuleOp mod = getOperation();
 
@@ -134,7 +139,8 @@ class TritonTLXFixupPass : public impl::TritonTLXFixupBase<TritonTLXFixupPass> {
       return signalPassFailure();
     }
 
-    if (failed(insertInvalBarrier(mod))) {
+    // InvalBarrierOp insertion is not needed for AMD
+    if (!isAMD() && failed(insertInvalBarrier(mod))) {
       return signalPassFailure();
     }