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add a touch of text on the backends
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docs/backend/oneapi.rst

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oneAPI
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======
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The ``oneAPI`` backend of hls4ml is designed for deploying NNs on Intel/Altera FPGAs. It will eventually
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replace the ``Quartus`` backend, which targeted Intel HLS. (Quartus continues to be used with IP produced by the
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``oneAPI`` backend.) This section discusses details of the ``oneAPI`` backend.
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The **oneAPI** backend of hls4ml is designed for deploying NNs on Intel/Altera FPGAs. It will eventually
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replace the **Quartus** backend, which targeted Intel HLS. (Quartus continues to be used with IP produced by the
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**oneAPI** backend.) This section discusses details of the **oneAPI** backend.
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The ``oneAPI`` code uses SYCL kernels to implement the logic that is deployed on FPGAs. It naturally leads to the
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The **oneAPI** code uses SYCL kernels to implement the logic that is deployed on FPGAs. It naturally leads to the
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accelerator style of programming. In the SYCL HLS (IP Component) flow, which is currently the only flow supported, the
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kernel becomes the IP, and the "host code" becomes the testbench. An accelerator flow, with easier deployment on
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PCIe accelerator boards, is planned to be added in the future.
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in hls4ml interact with the cmake system, so one does not need to manually use the build system, but it there
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if desired.
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The ``oneAPI`` backend, like the ``Quartus`` backend, only implements the ``Resource`` strategy for the layers. There
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The **oneAPI** backend, like the **Quartus** backend, only implements the ``Resource`` strategy for the layers. There
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is no ``Latency`` implementation of any of the layers.
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Note: currently tracing and external weights (i.e. setting BramFactor) are not supported.

docs/backend/quartus.rst

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=======
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.. warning::
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Quartus backend is deprecated and will be removed in a future version. Users should migrate to oneAPI backend.
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The **Quartus** backend is deprecated and will be removed in a future version. Users should migrate to the **oneAPI** backend.
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*TODO expand this section*
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The **Quartus** backend of hls4ml is designed for deploying NNs on Intel/Altera FPGAs. It uses the discontinued Intel HLS compiler. The **oneAPI** backend should be preferred for new projects.
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The **oneAPI** backend contains the migrated the HLS code from this backend, with significantly better io_stream support, though the **oneAPI** backend does not yet support profiling, tracing,
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or the BramFactor option supported by the **Quartus** backend. Nevertheless, little or no further development is expected for this backend.
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The **Quartus** backend only implements the ``Resource`` strategy for the layers. There is no ``Latency`` implementation of any of the layers.

docs/backend/vitis.rst

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Vivado/Vitis
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============
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``Vivado`` and ``Vitis`` backends are aimed for use with Xilinx FPGAs. They are currently the most advanced and well-supported backends of ``hls4ml``.
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The **Vivado** and **Vitis** backends are aimed for use with AMD/Xilinx FPGAs. The **Vivado** backend targets the discontinued ``Vivado HLS`` compiler, while
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the **Vitis** backend targets the ``Vitis HLS`` compiler. Both are designed to produce IP for incorporation in ``Vivado`` designs. (See :doc:`VivadoAccelerator <accelerator>`
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for generating easily-deployable models with ``Vivado HLS``.) The ``Vitis`` accelerator flow is not directly supported, though HLS produced with the **Vitis**
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backend can be easily incorporated into Vitis kernel.
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Users should generally use the **Vitis** backend for new designs that target AMD/Xilinx FPGAs; new ``hls4ml`` developments will not necessarily be backported to
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the **Vivado** backend.
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*TODO expand this section*

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