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Copy file name to clipboardExpand all lines: docs/backend/quartus.rst
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.. warning::
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Quartus backend is deprecated and will be removed in a future version. Users should migrate to oneAPI backend.
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The **Quartus** backend is deprecated and will be removed in a future version. Users should migrate to the **oneAPI** backend.
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*TODO expand this section*
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The **Quartus** backend of hls4ml is designed for deploying NNs on Intel/Altera FPGAs. It uses the discontinued Intel HLS compiler. The **oneAPI** backend should be preferred for new projects.
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The **oneAPI** backend contains the migrated the HLS code from this backend, with significantly better io_stream support, though the **oneAPI** backend does not yet support profiling, tracing,
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or the BramFactor option supported by the **Quartus** backend. Nevertheless, little or no further development is expected for this backend.
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The **Quartus** backend only implements the ``Resource`` strategy for the layers. There is no ``Latency`` implementation of any of the layers.
Copy file name to clipboardExpand all lines: docs/backend/vitis.rst
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Vivado/Vitis
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``Vivado`` and ``Vitis`` backends are aimed for use with Xilinx FPGAs. They are currently the most advanced and well-supported backends of ``hls4ml``.
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The **Vivado** and **Vitis** backends are aimed for use with AMD/Xilinx FPGAs. The **Vivado** backend targets the discontinued ``Vivado HLS`` compiler, while
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the **Vitis** backend targets the ``Vitis HLS`` compiler. Both are designed to produce IP for incorporation in ``Vivado`` designs. (See :doc:`VivadoAccelerator <accelerator>`
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for generating easily-deployable models with ``Vivado HLS``.) The ``Vitis`` accelerator flow is not directly supported, though HLS produced with the **Vitis**
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backend can be easily incorporated into Vitis kernel.
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Users should generally use the **Vitis** backend for new designs that target AMD/Xilinx FPGAs; new ``hls4ml`` developments will not necessarily be backported to
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