Weights at the interface for VivadoAccelerator backend with AXI master interface

Author: GiuseppeDiGuglielmo

hls4ml/backends/vivado_accelerator/supported_boards.json

@@ -1,8 +1,8 @@
 {
   "pynq-z2": {
     "part": "xc7z020clg400-1",
-    "tcl_scripts": {"axi_lite": "axi_lite_design.tcl", "axi_stream":  "axi_stream_design.tcl"},
-    "python_drivers": {"axi_stream":  "axi_stream_driver.py"},
+    "tcl_scripts": {"axi_lite": "axi_lite_design.tcl", "axi_stream":  "axi_stream_design.tcl", "axi_master":  "axi_master_design.tcl"},
+    "python_drivers": {"axi_stream":  "axi_stream_driver.py", "axi_master":  "axi_master_driver.py"},
     "c_drivers": {}
   },
   "zcu102": {

hls4ml/templates/vivado_accelerator/pynq-z2/python_drivers/axi_master_driver.py

@@ -0,0 +1 @@
+print('This is a placeholder!')

hls4ml/templates/vivado_accelerator/pynq-z2/tcl_scripts/axi_master_design.tcl

@@ -0,0 +1 @@
+puts("This is a placeholder!")

hls4ml/writer/vivado_accelerator_writer.py

@@ -82,11 +82,15 @@ def write_axi_wrapper(self, model):
 
         io_type = model.config.get_config_value("IOType")
 
+        model_brams = [var for var in model.get_weight_variables() if var.storage.lower() == 'bram']
+
         for line in f.readlines():
             if 'void myproject(' in line:
                 newline = 'void {}_axi(\n'.format(model.config.get_project_name())
             elif '//hls-fpga-machine-learning insert include' in line:
                 newline = '#include "{}_axi.h"\n'.format(model.config.get_project_name())
+                for b in model_brams:
+                    newline += '#include "weights/{}.h"\n'.format(b.name)
             elif '//hls-fpga-machine-learning insert local vars' in line:
                 newline = ''
                 if self.vivado_accelerator_config.get_interface() == 'axi_stream':
@@ -102,8 +106,8 @@ def write_axi_wrapper(self, model):
                     newline += indent + '#pragma HLS STREAM variable=out_local depth={}\n'\
                         .format(model.get_output_variables()[0].pragma[1])
             elif '//hls-fpga-machine-learning insert call' in line:
-                newline = indent + '{}(in_local, out_local);\n'.format(
-                    model.config.get_project_name())
+                brams_str = (''.join([', ' + b.name for b in model_brams])) if len(model_brams) > 0 else "";
+                newline = indent + '{}(in_local, out_local{});\n'.format(model.config.get_project_name(), brams_str)
             elif '//hls-fpga-machine-learning insert interface' in line:
                 if self.vivado_accelerator_config.get_interface() == 'axi_lite':
                     newline = ''

hls4ml/writer/vivado_writer.py

@@ -37,10 +37,10 @@ def print_array_to_cpp(self, var, odir, write_txt_file=True):
 
         if write_txt_file:
             h_file.write("#ifndef __SYNTHESIS__\n")
-            h_file.write(var.definition_cpp() + ";\n")
+            h_file.write("static " + var.definition_cpp() + ";\n")
             h_file.write("#else\n")
 
-        h_file.write(var.definition_cpp() + " = {")
+        h_file.write("static " + var.definition_cpp() + " = {")
 
         #fill c++ array.
         #not including internal brackets for multidimensional case