red-pitaya-notes/Bitfile IDs.txt at master · ffb-LANL/red-pitaya-notes · GitHub

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lockin digitizer 101
digitizer 102 152
lockin_sweep 103
current-voltage 2023 104
current-voltage 2024 154
slow_iv 2023 105
slow_iv 2024 155
fast digitizer 107
synchronous lockin 108
dual channel lockin 109
#current-voltage test pattern 110
fast digitizer delayed 111
level_trigger 112
single channel lockin 113
slow dual channel lockin 2023 114
slow dual channel lockin 2024 164
dual channel lockin 2024 159
dual channel lockin 122.88 2024 169
4adc recorder 157
4adc digitizer 158

CFG map:
0-0     PKTZR RESET | writer_reset
1-1     WRITE ENABLE | run
3-3     SOFT TRIGGER
4-4     TRX RESET
7-7     OUTPUT SWITCH FWD/REV
32-63   +4 RECORD_LENGTH | tot_data
64-95   +8 FREQUENCY_0 WORD
96-127  +12 DECIMATION
128-159 +16 INTERPOLAION
160-319 +20 I-V CFG (total_sweeps[16]: +22 ramp[16]:+24 width[16]: +26 unused[16]: +28 threshold[32]:+32 waveform_length[16]:+36 pulse_length[32])
224-255 +28 DDS DELAY
320-351 +40 TRIGGER DELAY
352-367 +44 TRIGGER LEVEL
368-383 +46 trig_mask
384-415	+48 writer_address
416-447	+52 pre-trigger data
448-479 +56 FREQUENCY_1 WORD
480-495 +60 OUTPUT SCALER 0
496-511 +62 OUTPUT OFFSET 0
512-527 +64 OUTPUT SCALER 1
528-543 +66 OUTPUT OFFSET 1


STS map:
0-31	writer_0/sts_data
32-63   +4 pktzr_0/trigger_pos | scope_0/sts_data
64-65	+8 pktzr_0/complete
80-95	+10 const_ID
96-127	+12  phase_snap_0
128-255	+16 value_xy     | 192-223 +24 Rx FIFO counter & 224-255 +28 Tx FIFO counter
256-287 +32 const_modulus | 2nd RX FIFO counter
288-319	+36 phase_snap_1 | 3nd RX FIFO counter
320-575	+40 values_xy (x0 (32 bits),y0(32 bits),x1...y4)