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[LoongArch][NFC] Add tests for vector fminnum/fmaxnum (llvm#162767)
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‎llvm/test/CodeGen/LoongArch/lasx/fp-max-min.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
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; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
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define void @minnum_v8f32(ptr %res, ptr %x, ptr %y) nounwind {
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; CHECK-LABEL: minnum_v8f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a2, 0
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; CHECK-NEXT: xvld $xr1, $a1, 0
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; CHECK-NEXT: xvpickve.w $xr2, $xr0, 5
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; CHECK-NEXT: xvpickve.w $xr3, $xr1, 5
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; CHECK-NEXT: fmin.s $fa2, $fa3, $fa2
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; CHECK-NEXT: xvpickve.w $xr3, $xr0, 4
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; CHECK-NEXT: xvpickve.w $xr4, $xr1, 4
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; CHECK-NEXT: fmin.s $fa3, $fa4, $fa3
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; CHECK-NEXT: vextrins.w $vr3, $vr2, 16
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; CHECK-NEXT: xvpickve.w $xr2, $xr0, 6
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; CHECK-NEXT: xvpickve.w $xr4, $xr1, 6
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; CHECK-NEXT: fmin.s $fa2, $fa4, $fa2
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; CHECK-NEXT: vextrins.w $vr3, $vr2, 32
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; CHECK-NEXT: xvpickve.w $xr2, $xr0, 7
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; CHECK-NEXT: xvpickve.w $xr4, $xr1, 7
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; CHECK-NEXT: fmin.s $fa2, $fa4, $fa2
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; CHECK-NEXT: vextrins.w $vr3, $vr2, 48
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; CHECK-NEXT: xvpickve.w $xr2, $xr0, 1
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; CHECK-NEXT: xvpickve.w $xr4, $xr1, 1
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; CHECK-NEXT: fmin.s $fa2, $fa4, $fa2
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; CHECK-NEXT: xvpickve.w $xr4, $xr0, 0
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; CHECK-NEXT: xvpickve.w $xr5, $xr1, 0
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; CHECK-NEXT: fmin.s $fa4, $fa5, $fa4
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; CHECK-NEXT: vextrins.w $vr4, $vr2, 16
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; CHECK-NEXT: xvpickve.w $xr2, $xr0, 2
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; CHECK-NEXT: xvpickve.w $xr5, $xr1, 2
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; CHECK-NEXT: fmin.s $fa2, $fa5, $fa2
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; CHECK-NEXT: vextrins.w $vr4, $vr2, 32
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; CHECK-NEXT: xvpickve.w $xr0, $xr0, 3
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; CHECK-NEXT: xvpickve.w $xr1, $xr1, 3
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; CHECK-NEXT: fmin.s $fa0, $fa1, $fa0
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; CHECK-NEXT: vextrins.w $vr4, $vr0, 48
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; CHECK-NEXT: xvpermi.q $xr4, $xr3, 2
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; CHECK-NEXT: xvst $xr4, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <8 x float>, ptr %x
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%v1 = load <8 x float>, ptr %y
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%r = call <8 x float> @llvm.minnum.v8f32(<8 x float> %v0, <8 x float> %v1)
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store <8 x float> %r, ptr %res
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ret void
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}
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define void @minnum_v4f64(ptr %res, ptr %x, ptr %y) nounwind {
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; CHECK-LABEL: minnum_v4f64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a2, 0
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; CHECK-NEXT: xvld $xr1, $a1, 0
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; CHECK-NEXT: xvpickve.d $xr2, $xr0, 3
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; CHECK-NEXT: xvpickve.d $xr3, $xr1, 3
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; CHECK-NEXT: fmin.d $fa2, $fa3, $fa2
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; CHECK-NEXT: xvpickve.d $xr3, $xr0, 2
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; CHECK-NEXT: xvpickve.d $xr4, $xr1, 2
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; CHECK-NEXT: fmin.d $fa3, $fa4, $fa3
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; CHECK-NEXT: vextrins.d $vr3, $vr2, 16
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; CHECK-NEXT: xvpickve.d $xr2, $xr0, 1
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; CHECK-NEXT: xvpickve.d $xr4, $xr1, 1
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; CHECK-NEXT: fmin.d $fa2, $fa4, $fa2
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; CHECK-NEXT: xvpickve.d $xr0, $xr0, 0
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; CHECK-NEXT: xvpickve.d $xr1, $xr1, 0
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; CHECK-NEXT: fmin.d $fa0, $fa1, $fa0
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; CHECK-NEXT: vextrins.d $vr0, $vr2, 16
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; CHECK-NEXT: xvpermi.q $xr0, $xr3, 2
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <4 x double>, ptr %x
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%v1 = load <4 x double>, ptr %y
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%r = call <4 x double> @llvm.minnum.v4f64(<4 x double> %v0, <4 x double> %v1)
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store <4 x double> %r, ptr %res
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ret void
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}
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define void @maxnum_v8f32(ptr %res, ptr %x, ptr %y) nounwind {
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; CHECK-LABEL: maxnum_v8f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a2, 0
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; CHECK-NEXT: xvld $xr1, $a1, 0
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; CHECK-NEXT: xvpickve.w $xr2, $xr0, 5
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; CHECK-NEXT: xvpickve.w $xr3, $xr1, 5
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; CHECK-NEXT: fmax.s $fa2, $fa3, $fa2
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; CHECK-NEXT: xvpickve.w $xr3, $xr0, 4
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; CHECK-NEXT: xvpickve.w $xr4, $xr1, 4
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; CHECK-NEXT: fmax.s $fa3, $fa4, $fa3
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; CHECK-NEXT: vextrins.w $vr3, $vr2, 16
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; CHECK-NEXT: xvpickve.w $xr2, $xr0, 6
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; CHECK-NEXT: xvpickve.w $xr4, $xr1, 6
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; CHECK-NEXT: fmax.s $fa2, $fa4, $fa2
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; CHECK-NEXT: vextrins.w $vr3, $vr2, 32
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; CHECK-NEXT: xvpickve.w $xr2, $xr0, 7
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; CHECK-NEXT: xvpickve.w $xr4, $xr1, 7
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; CHECK-NEXT: fmax.s $fa2, $fa4, $fa2
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; CHECK-NEXT: vextrins.w $vr3, $vr2, 48
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; CHECK-NEXT: xvpickve.w $xr2, $xr0, 1
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; CHECK-NEXT: xvpickve.w $xr4, $xr1, 1
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; CHECK-NEXT: fmax.s $fa2, $fa4, $fa2
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; CHECK-NEXT: xvpickve.w $xr4, $xr0, 0
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; CHECK-NEXT: xvpickve.w $xr5, $xr1, 0
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; CHECK-NEXT: fmax.s $fa4, $fa5, $fa4
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; CHECK-NEXT: vextrins.w $vr4, $vr2, 16
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; CHECK-NEXT: xvpickve.w $xr2, $xr0, 2
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; CHECK-NEXT: xvpickve.w $xr5, $xr1, 2
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; CHECK-NEXT: fmax.s $fa2, $fa5, $fa2
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; CHECK-NEXT: vextrins.w $vr4, $vr2, 32
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; CHECK-NEXT: xvpickve.w $xr0, $xr0, 3
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; CHECK-NEXT: xvpickve.w $xr1, $xr1, 3
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; CHECK-NEXT: fmax.s $fa0, $fa1, $fa0
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; CHECK-NEXT: vextrins.w $vr4, $vr0, 48
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; CHECK-NEXT: xvpermi.q $xr4, $xr3, 2
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; CHECK-NEXT: xvst $xr4, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <8 x float>, ptr %x
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%v1 = load <8 x float>, ptr %y
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%r = call <8 x float> @llvm.maxnum.v8f32(<8 x float> %v0, <8 x float> %v1)
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store <8 x float> %r, ptr %res
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ret void
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}
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define void @maxnum_v4f64(ptr %res, ptr %x, ptr %y) nounwind {
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; CHECK-LABEL: maxnum_v4f64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a2, 0
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; CHECK-NEXT: xvld $xr1, $a1, 0
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; CHECK-NEXT: xvpickve.d $xr2, $xr0, 3
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; CHECK-NEXT: xvpickve.d $xr3, $xr1, 3
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; CHECK-NEXT: fmax.d $fa2, $fa3, $fa2
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; CHECK-NEXT: xvpickve.d $xr3, $xr0, 2
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; CHECK-NEXT: xvpickve.d $xr4, $xr1, 2
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; CHECK-NEXT: fmax.d $fa3, $fa4, $fa3
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; CHECK-NEXT: vextrins.d $vr3, $vr2, 16
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; CHECK-NEXT: xvpickve.d $xr2, $xr0, 1
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; CHECK-NEXT: xvpickve.d $xr4, $xr1, 1
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; CHECK-NEXT: fmax.d $fa2, $fa4, $fa2
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; CHECK-NEXT: xvpickve.d $xr0, $xr0, 0
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; CHECK-NEXT: xvpickve.d $xr1, $xr1, 0
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; CHECK-NEXT: fmax.d $fa0, $fa1, $fa0
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; CHECK-NEXT: vextrins.d $vr0, $vr2, 16
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; CHECK-NEXT: xvpermi.q $xr0, $xr3, 2
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <4 x double>, ptr %x
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%v1 = load <4 x double>, ptr %y
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%r = call <4 x double> @llvm.maxnum.v4f64(<4 x double> %v0, <4 x double> %v1)
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store <4 x double> %r, ptr %res
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ret void
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}
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declare <8 x float> @llvm.minnum.v8f32(<8 x float>, <8 x float>)
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declare <4 x double> @llvm.minnum.v4f64(<4 x double>, <4 x double>)
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declare <8 x float> @llvm.maxnum.v8f32(<8 x float>, <8 x float>)
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declare <4 x double> @llvm.maxnum.v4f64(<4 x double>, <4 x double>)

‎llvm/test/CodeGen/LoongArch/lsx/fp-max-min.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx < %s | FileCheck %s
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; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
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define void @minnum_v4f32(ptr %res, ptr %x, ptr %y) nounwind {
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; CHECK-LABEL: minnum_v4f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vld $vr0, $a2, 0
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; CHECK-NEXT: vld $vr1, $a1, 0
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; CHECK-NEXT: vreplvei.w $vr2, $vr0, 1
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; CHECK-NEXT: vreplvei.w $vr3, $vr1, 1
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; CHECK-NEXT: fmin.s $fa2, $fa3, $fa2
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; CHECK-NEXT: vreplvei.w $vr3, $vr0, 0
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; CHECK-NEXT: vreplvei.w $vr4, $vr1, 0
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; CHECK-NEXT: fmin.s $fa3, $fa4, $fa3
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; CHECK-NEXT: vextrins.w $vr3, $vr2, 16
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; CHECK-NEXT: vreplvei.w $vr2, $vr0, 2
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; CHECK-NEXT: vreplvei.w $vr4, $vr1, 2
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; CHECK-NEXT: fmin.s $fa2, $fa4, $fa2
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; CHECK-NEXT: vextrins.w $vr3, $vr2, 32
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; CHECK-NEXT: vreplvei.w $vr0, $vr0, 3
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 3
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; CHECK-NEXT: fmin.s $fa0, $fa1, $fa0
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; CHECK-NEXT: vextrins.w $vr3, $vr0, 48
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; CHECK-NEXT: vst $vr3, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <4 x float>, ptr %x
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%v1 = load <4 x float>, ptr %y
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%r = call <4 x float> @llvm.minnum.v4f32(<4 x float> %v0, <4 x float> %v1)
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store <4 x float> %r, ptr %res
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ret void
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}
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define void @minnum_v2f64(ptr %res, ptr %x, ptr %y) nounwind {
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; CHECK-LABEL: minnum_v2f64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vld $vr0, $a2, 0
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; CHECK-NEXT: vld $vr1, $a1, 0
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; CHECK-NEXT: vreplvei.d $vr2, $vr0, 1
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; CHECK-NEXT: vreplvei.d $vr3, $vr1, 1
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; CHECK-NEXT: fmin.d $fa2, $fa3, $fa2
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; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0
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; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0
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; CHECK-NEXT: fmin.d $fa0, $fa1, $fa0
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; CHECK-NEXT: vextrins.d $vr0, $vr2, 16
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; CHECK-NEXT: vst $vr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <2 x double>, ptr %x
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%v1 = load <2 x double>, ptr %y
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%r = call <2 x double> @llvm.minnum.v2f64(<2 x double> %v0, <2 x double> %v1)
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store <2 x double> %r, ptr %res
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ret void
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}
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define void @maxnum_v4f32(ptr %res, ptr %x, ptr %y) nounwind {
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; CHECK-LABEL: maxnum_v4f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vld $vr0, $a2, 0
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; CHECK-NEXT: vld $vr1, $a1, 0
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; CHECK-NEXT: vreplvei.w $vr2, $vr0, 1
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; CHECK-NEXT: vreplvei.w $vr3, $vr1, 1
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; CHECK-NEXT: fmax.s $fa2, $fa3, $fa2
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; CHECK-NEXT: vreplvei.w $vr3, $vr0, 0
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; CHECK-NEXT: vreplvei.w $vr4, $vr1, 0
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; CHECK-NEXT: fmax.s $fa3, $fa4, $fa3
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; CHECK-NEXT: vextrins.w $vr3, $vr2, 16
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; CHECK-NEXT: vreplvei.w $vr2, $vr0, 2
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; CHECK-NEXT: vreplvei.w $vr4, $vr1, 2
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; CHECK-NEXT: fmax.s $fa2, $fa4, $fa2
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; CHECK-NEXT: vextrins.w $vr3, $vr2, 32
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; CHECK-NEXT: vreplvei.w $vr0, $vr0, 3
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 3
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; CHECK-NEXT: fmax.s $fa0, $fa1, $fa0
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; CHECK-NEXT: vextrins.w $vr3, $vr0, 48
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; CHECK-NEXT: vst $vr3, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <4 x float>, ptr %x
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%v1 = load <4 x float>, ptr %y
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%r = call <4 x float> @llvm.maxnum.v4f32(<4 x float> %v0, <4 x float> %v1)
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store <4 x float> %r, ptr %res
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ret void
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}
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define void @maxnum_v2f64(ptr %res, ptr %x, ptr %y) nounwind {
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; CHECK-LABEL: maxnum_v2f64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vld $vr0, $a2, 0
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; CHECK-NEXT: vld $vr1, $a1, 0
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; CHECK-NEXT: vreplvei.d $vr2, $vr0, 1
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; CHECK-NEXT: vreplvei.d $vr3, $vr1, 1
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; CHECK-NEXT: fmax.d $fa2, $fa3, $fa2
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; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0
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; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0
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; CHECK-NEXT: fmax.d $fa0, $fa1, $fa0
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; CHECK-NEXT: vextrins.d $vr0, $vr2, 16
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; CHECK-NEXT: vst $vr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <2 x double>, ptr %x
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%v1 = load <2 x double>, ptr %y
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%r = call <2 x double> @llvm.maxnum.v2f64(<2 x double> %v0, <2 x double> %v1)
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store <2 x double> %r, ptr %res
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ret void
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}
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declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>)
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declare <2 x double> @llvm.minnum.v2f64(<2 x double>, <2 x double>)
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declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>)
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declare <2 x double> @llvm.maxnum.v2f64(<2 x double>, <2 x double>)

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