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[TailDup] Delay aggressive computed-goto taildup to after RegAlloc. (llvm#150911)
Back-ports additional tests (eb9febb4a6b0, dc697de12792), refactoring (43c9c14577db) and functional change (18f1369297f4) in a single PR. llvm#114990 allowed more aggressive tail duplication for computed-gotos in both pre- and post-regalloc tail duplication. In some cases, performing tail-duplication too early can lead to worse results, especially if we duplicate blocks with a number of phi nodes. This is causing a ~3% performance regression in some workloads using Python 3.12. This patch updates TailDup to delay aggressive tail-duplication for computed gotos to after register allocation. This means we can keep the non-duplicated version for a bit longer throughout the backend, which should reduce compile-time as well as allowing a number of optimizations and simplifications to trigger before drastically expanding the CFG. For the case in llvm#106846, I get the same performance with and without this patch on Skylake. PR: llvm#150911
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-32
lines changed

5 files changed

+310
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lines changed

‎llvm/include/llvm/CodeGen/MachineBasicBlock.h

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -323,10 +323,11 @@ class MachineBasicBlock
323323
const MachineFunction *getParent() const { return xParent; }
324324
MachineFunction *getParent() { return xParent; }
325325

326-
/// Returns true if the original IR terminator is an `indirectbr`. This
327-
/// typically corresponds to a `goto` in C, rather than jump tables.
328-
bool terminatorIsComputedGoto() const {
329-
return back().isIndirectBranch() &&
326+
/// Returns true if the original IR terminator is an `indirectbr` with
327+
/// successor blocks. This typically corresponds to a `goto` in C, rather than
328+
/// jump tables.
329+
bool terminatorIsComputedGotoWithSuccessors() const {
330+
return back().isIndirectBranch() && !succ_empty() &&
330331
llvm::all_of(successors(), [](const MachineBasicBlock *Succ) {
331332
return Succ->isIRBlockAddressTaken();
332333
});

‎llvm/lib/CodeGen/TailDuplicator.cpp

Lines changed: 11 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -604,12 +604,21 @@ bool TailDuplicator::shouldTailDuplicate(bool IsSimple,
604604
bool HasComputedGoto = false;
605605
if (!TailBB.empty()) {
606606
HasIndirectbr = TailBB.back().isIndirectBranch();
607-
HasComputedGoto = TailBB.terminatorIsComputedGoto();
607+
HasComputedGoto = TailBB.terminatorIsComputedGotoWithSuccessors();
608608
}
609609

610610
if (HasIndirectbr && PreRegAlloc)
611611
MaxDuplicateCount = TailDupIndirectBranchSize;
612612

613+
// Allow higher limits when the block has computed-gotos and running after
614+
// register allocation. NB. This basically unfactors computed gotos that were
615+
// factored early on in the compilation process to speed up edge based data
616+
// flow. If we do not unfactor them again, it can seriously pessimize code
617+
// with many computed jumps in the source code, such as interpreters.
618+
// Therefore we do not restrict the computed gotos.
619+
if (HasComputedGoto && !PreRegAlloc)
620+
MaxDuplicateCount = std::max(MaxDuplicateCount, 10u);
621+
613622
// Check the instructions in the block to determine whether tail-duplication
614623
// is invalid or unlikely to be profitable.
615624
unsigned InstrCount = 0;
@@ -663,12 +672,7 @@ bool TailDuplicator::shouldTailDuplicate(bool IsSimple,
663672
// Duplicating a BB which has both multiple predecessors and successors will
664673
// may cause huge amount of PHI nodes. If we want to remove this limitation,
665674
// we have to address https://github.com/llvm/llvm-project/issues/78578.
666-
// NB. This basically unfactors computed gotos that were factored early on in
667-
// the compilation process to speed up edge based data flow. If we do not
668-
// unfactor them again, it can seriously pessimize code with many computed
669-
// jumps in the source code, such as interpreters. Therefore we do not
670-
// restrict the computed gotos.
671-
if (!HasComputedGoto && TailBB.pred_size() > TailDupPredSize &&
675+
if (PreRegAlloc && TailBB.pred_size() > TailDupPredSize &&
672676
TailBB.succ_size() > TailDupSuccSize) {
673677
// If TailBB or any of its successors contains a phi, we may have to add a
674678
// large number of additional phis with additional incoming values.

‎llvm/test/CodeGen/AArch64/late-taildup-computed-goto.ll

Lines changed: 143 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,143 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2+
; RUN: llc -tail-dup-pred-size=2 -tail-dup-succ-size=2 -o - %s | FileCheck %s
3+
4+
target triple = "arm64-apple-macosx13.0.0"
5+
6+
@opcode.targets = local_unnamed_addr constant [6 x ptr] [ptr blockaddress(@test_interp, %op1.bb), ptr blockaddress(@test_interp, %op6.bb), ptr blockaddress(@test_interp, %loop.header), ptr blockaddress(@test_interp, %op2.bb), ptr blockaddress(@test_interp, %op4.bb), ptr blockaddress(@test_interp, %op5.bb)]
7+
8+
define void @test_interp(ptr %frame, ptr %dst) {
9+
; CHECK-LABEL: test_interp:
10+
; CHECK: ; %bb.0: ; %entry
11+
; CHECK-NEXT: stp x24, x23, [sp, #-64]! ; 16-byte Folded Spill
12+
; CHECK-NEXT: stp x22, x21, [sp, #16] ; 16-byte Folded Spill
13+
; CHECK-NEXT: stp x20, x19, [sp, #32] ; 16-byte Folded Spill
14+
; CHECK-NEXT: stp x29, x30, [sp, #48] ; 16-byte Folded Spill
15+
; CHECK-NEXT: .cfi_def_cfa_offset 64
16+
; CHECK-NEXT: .cfi_offset w30, -8
17+
; CHECK-NEXT: .cfi_offset w29, -16
18+
; CHECK-NEXT: .cfi_offset w19, -24
19+
; CHECK-NEXT: .cfi_offset w20, -32
20+
; CHECK-NEXT: .cfi_offset w21, -40
21+
; CHECK-NEXT: .cfi_offset w22, -48
22+
; CHECK-NEXT: .cfi_offset w23, -56
23+
; CHECK-NEXT: .cfi_offset w24, -64
24+
; CHECK-NEXT: Lloh0:
25+
; CHECK-NEXT: adrp x21, _opcode.targets@PAGE
26+
; CHECK-NEXT: Lloh1:
27+
; CHECK-NEXT: add x21, x21, _opcode.targets@PAGEOFF
28+
; CHECK-NEXT: mov x24, xzr
29+
; CHECK-NEXT: add x8, x21, xzr, lsl #3
30+
; CHECK-NEXT: mov x19, x1
31+
; CHECK-NEXT: mov x20, x0
32+
; CHECK-NEXT: mov x23, xzr
33+
; CHECK-NEXT: mov w22, #1 ; =0x1
34+
; CHECK-NEXT: add x24, x24, #1
35+
; CHECK-NEXT: br x8
36+
; CHECK-NEXT: Ltmp0: ; Block address taken
37+
; CHECK-NEXT: LBB0_1: ; %loop.header
38+
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
39+
; CHECK-NEXT: add x8, x21, x24, lsl #3
40+
; CHECK-NEXT: mov x20, xzr
41+
; CHECK-NEXT: mov x23, xzr
42+
; CHECK-NEXT: add x24, x24, #1
43+
; CHECK-NEXT: br x8
44+
; CHECK-NEXT: Ltmp1: ; Block address taken
45+
; CHECK-NEXT: LBB0_2: ; %op1.bb
46+
; CHECK-NEXT: str xzr, [x19]
47+
; CHECK-NEXT: Ltmp2: ; Block address taken
48+
; CHECK-NEXT: LBB0_3: ; %op6.bb
49+
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
50+
; CHECK-NEXT: ldr x0, [x20, #-8]!
51+
; CHECK-NEXT: ldr x8, [x0, #8]
52+
; CHECK-NEXT: str x22, [x0]
53+
; CHECK-NEXT: ldr x8, [x8, #48]
54+
; CHECK-NEXT: blr x8
55+
; CHECK-NEXT: add x8, x21, x24, lsl #3
56+
; CHECK-NEXT: add x24, x24, #1
57+
; CHECK-NEXT: br x8
58+
; CHECK-NEXT: Ltmp3: ; Block address taken
59+
; CHECK-NEXT: LBB0_4: ; %op2.bb
60+
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
61+
; CHECK-NEXT: add x8, x21, x24, lsl #3
62+
; CHECK-NEXT: mov x20, xzr
63+
; CHECK-NEXT: str x23, [x19]
64+
; CHECK-NEXT: mov x23, xzr
65+
; CHECK-NEXT: add x24, x24, #1
66+
; CHECK-NEXT: br x8
67+
; CHECK-NEXT: Ltmp4: ; Block address taken
68+
; CHECK-NEXT: LBB0_5: ; %op4.bb
69+
; CHECK-NEXT: Ltmp5: ; Block address taken
70+
; CHECK-NEXT: LBB0_6: ; %op5.bb
71+
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
72+
; CHECK-NEXT: str x23, [x19]
73+
; CHECK-NEXT: ldur x8, [x23, #12]
74+
; CHECK-NEXT: ldur x9, [x20, #-8]
75+
; CHECK-NEXT: add x23, x23, #20
76+
; CHECK-NEXT: stp x8, x9, [x20, #-8]
77+
; CHECK-NEXT: add x8, x21, x24, lsl #3
78+
; CHECK-NEXT: add x20, x20, #8
79+
; CHECK-NEXT: add x24, x24, #1
80+
; CHECK-NEXT: br x8
81+
; CHECK-NEXT: .loh AdrpAdd Lloh0, Lloh1
82+
entry:
83+
br label %loop.header
84+
85+
loop.header:
86+
%iv = phi i64 [ 0, %entry ], [ %iv.next, %op1.bb ], [ %iv.next, %op2.bb ], [ %iv.next, %op4.bb ], [ %iv.next, %op5.bb ], [ %iv.next, %op6.bb ], [ %iv.next, %loop.header ]
87+
%stack.pointer = phi ptr [ %frame, %entry ], [ %stack.8, %op1.bb ], [ null, %op2.bb ], [ %stack.next, %op4.bb ], [ %stack.next.2, %op5.bb ], [ %stack.4, %op6.bb ], [ null, %loop.header ]
88+
%next.instr = phi ptr [ null, %entry ], [ %next.instr, %op1.bb ], [ null, %op2.bb ], [ %next.instr.20, %op4.bb ], [ %next.instr.21, %op5.bb ], [ %next.instr, %op6.bb ], [ null, %loop.header ]
89+
%iv.next = add i64 %iv, 1
90+
%next_op = getelementptr [6 x ptr], ptr @opcode.targets, i64 0, i64 %iv
91+
indirectbr ptr %next_op, [label %op1.bb, label %op6.bb, label %loop.header, label %op2.bb, label %op4.bb, label %op5.bb]
92+
93+
op1.bb:
94+
store ptr null, ptr %dst, align 8
95+
%stack.8 = getelementptr i8, ptr %stack.pointer, i64 -8
96+
%l.0 = load ptr, ptr %stack.8, align 8
97+
store i64 1, ptr %l.0, align 8
98+
%gep.0 = getelementptr i8, ptr %l.0, i64 8
99+
%l.1 = load ptr, ptr %gep.0, align 8
100+
%gep.1 = getelementptr i8, ptr %l.1, i64 48
101+
%l.2 = load ptr, ptr %gep.1, align 8
102+
tail call void %l.2(ptr nonnull %l.0)
103+
br label %loop.header
104+
105+
op2.bb:
106+
store ptr %next.instr, ptr %dst, align 8
107+
br label %loop.header
108+
109+
op4.bb:
110+
store ptr %next.instr, ptr %dst, align 8
111+
%next.instr.20 = getelementptr i8, ptr %next.instr, i64 20
112+
%stack.2 = getelementptr i8, ptr %stack.pointer, i64 -8
113+
%l.3 = load ptr, ptr %stack.2, align 8
114+
%next.instr.12 = getelementptr i8, ptr %next.instr, i64 12
115+
%next.instr.12.val = load ptr, ptr %next.instr.12, align 2
116+
store ptr %next.instr.12.val, ptr %stack.2, align 8
117+
store ptr %l.3, ptr %stack.pointer, align 8
118+
%stack.next = getelementptr i8, ptr %stack.pointer, i64 8
119+
br label %loop.header
120+
121+
op5.bb:
122+
store ptr %next.instr, ptr %dst, align 8
123+
%next.instr.21 = getelementptr i8, ptr %next.instr, i64 20
124+
%stack.3 = getelementptr i8, ptr %stack.pointer, i64 -8
125+
%l.4 = load ptr, ptr %stack.3, align 8
126+
%next.instr.2 = getelementptr i8, ptr %next.instr, i64 12
127+
%next.instr.2.val = load ptr, ptr %next.instr.2, align 2
128+
store ptr %next.instr.2.val, ptr %stack.3, align 8
129+
store ptr %l.4, ptr %stack.pointer, align 8
130+
%stack.next.2 = getelementptr i8, ptr %stack.pointer, i64 8
131+
br label %loop.header
132+
133+
op6.bb:
134+
%stack.4 = getelementptr i8, ptr %stack.pointer, i64 -8
135+
%l.5 = load ptr, ptr %stack.4, align 8
136+
store i64 1, ptr %l.5, align 8
137+
%gep.5 = getelementptr i8, ptr %l.5, i64 8
138+
%l.6 = load ptr, ptr %gep.5, align 8
139+
%gep.6 = getelementptr i8, ptr %l.6, i64 48
140+
%l.7 = load ptr, ptr %gep.6, align 8
141+
tail call void %l.7(ptr nonnull %l.5)
142+
br label %loop.header
143+
}

‎llvm/test/CodeGen/X86/tail-dup-computed-goto.mir renamed to ‎llvm/test/CodeGen/X86/early-tail-dup-computed-goto.mir

Lines changed: 23 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
22
# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=early-tailduplication -tail-dup-pred-size=1 -tail-dup-succ-size=1 %s -o - | FileCheck %s
3-
# Check that only the computed goto is not be restrict by tail-dup-pred-size and tail-dup-succ-size.
3+
#
4+
# Check that only the computed goto and others are restricted by tail-dup-pred-size and tail-dup-succ-size.
5+
#
46
--- |
57
@computed_goto.dispatch = constant [5 x ptr] [ptr null, ptr blockaddress(@computed_goto, %bb1), ptr blockaddress(@computed_goto, %bb2), ptr blockaddress(@computed_goto, %bb3), ptr blockaddress(@computed_goto, %bb4)]
68
declare i64 @f0()
@@ -30,54 +32,54 @@ tracksRegLiveness: true
3032
body: |
3133
; CHECK-LABEL: name: computed_goto
3234
; CHECK: bb.0:
33-
; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
35+
; CHECK-NEXT: successors: %bb.5(0x80000000)
3436
; CHECK-NEXT: {{ $}}
3537
; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
3638
; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f0, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
3739
; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
38-
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64_nosp = COPY $rax
39-
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64_nosp = COPY [[COPY]]
40-
; CHECK-NEXT: JMP64m $noreg, 8, [[COPY]], @computed_goto.dispatch, $noreg
40+
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rax
41+
; CHECK-NEXT: JMP_1 %bb.5
4142
; CHECK-NEXT: {{ $}}
4243
; CHECK-NEXT: bb.1.bb1 (ir-block-address-taken %ir-block.bb1):
43-
; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
44+
; CHECK-NEXT: successors: %bb.5(0x80000000)
4445
; CHECK-NEXT: {{ $}}
4546
; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
4647
; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f1, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
4748
; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
48-
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64_nosp = COPY $rax
49-
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr64_nosp = COPY [[COPY2]]
50-
; CHECK-NEXT: JMP64m $noreg, 8, [[COPY2]], @computed_goto.dispatch, $noreg
49+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rax
50+
; CHECK-NEXT: JMP_1 %bb.5
5151
; CHECK-NEXT: {{ $}}
5252
; CHECK-NEXT: bb.2.bb2 (ir-block-address-taken %ir-block.bb2):
53-
; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
53+
; CHECK-NEXT: successors: %bb.5(0x80000000)
5454
; CHECK-NEXT: {{ $}}
5555
; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
5656
; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f2, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
5757
; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
58-
; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr64_nosp = COPY $rax
59-
; CHECK-NEXT: [[COPY5:%[0-9]+]]:gr64_nosp = COPY [[COPY4]]
60-
; CHECK-NEXT: JMP64m $noreg, 8, [[COPY4]], @computed_goto.dispatch, $noreg
58+
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64 = COPY $rax
59+
; CHECK-NEXT: JMP_1 %bb.5
6160
; CHECK-NEXT: {{ $}}
6261
; CHECK-NEXT: bb.3.bb3 (ir-block-address-taken %ir-block.bb3):
63-
; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
62+
; CHECK-NEXT: successors: %bb.5(0x80000000)
6463
; CHECK-NEXT: {{ $}}
6564
; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
6665
; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f3, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
6766
; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
68-
; CHECK-NEXT: [[COPY6:%[0-9]+]]:gr64_nosp = COPY $rax
69-
; CHECK-NEXT: [[COPY7:%[0-9]+]]:gr64_nosp = COPY [[COPY6]]
70-
; CHECK-NEXT: JMP64m $noreg, 8, [[COPY6]], @computed_goto.dispatch, $noreg
67+
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr64 = COPY $rax
68+
; CHECK-NEXT: JMP_1 %bb.5
7169
; CHECK-NEXT: {{ $}}
7270
; CHECK-NEXT: bb.4.bb4 (ir-block-address-taken %ir-block.bb4):
73-
; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
71+
; CHECK-NEXT: successors: %bb.5(0x80000000)
7472
; CHECK-NEXT: {{ $}}
7573
; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
7674
; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f4, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
7775
; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
78-
; CHECK-NEXT: [[COPY8:%[0-9]+]]:gr64_nosp = COPY $rax
79-
; CHECK-NEXT: [[COPY9:%[0-9]+]]:gr64_nosp = COPY [[COPY8]]
80-
; CHECK-NEXT: JMP64m $noreg, 8, [[COPY8]], @computed_goto.dispatch, $noreg
76+
; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr64 = COPY $rax
77+
; CHECK-NEXT: {{ $}}
78+
; CHECK-NEXT: bb.5:
79+
; CHECK-NEXT: successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
80+
; CHECK-NEXT: {{ $}}
81+
; CHECK-NEXT: [[PHI:%[0-9]+]]:gr64_nosp = PHI [[COPY]], %bb.0, [[COPY4]], %bb.4, [[COPY3]], %bb.3, [[COPY2]], %bb.2, [[COPY1]], %bb.1
82+
; CHECK-NEXT: JMP64m $noreg, 8, [[PHI]], @computed_goto.dispatch, $noreg
8183
bb.0:
8284
ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
8385
CALL64pcrel32 target-flags(x86-plt) @f0, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax

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