@@ -495,13 +495,14 @@ class CodeGenSchedModels {
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return ProcModels[I->second ];
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}
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- CodeGenProcModel &getProcModel (const Record *ModelDef) {
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+ const CodeGenProcModel &getProcModel (const Record *ModelDef) const {
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ProcModelMapTy::const_iterator I = ProcModelMap.find (ModelDef);
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assert (I != ProcModelMap.end () && " missing machine model" );
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return ProcModels[I->second ];
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}
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- const CodeGenProcModel &getProcModel (const Record *ModelDef) const {
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- return const_cast <CodeGenSchedModels *>(this )->getProcModel (ModelDef);
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+ CodeGenProcModel &getProcModel (const Record *ModelDef) {
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+ return const_cast <CodeGenProcModel &>(
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+ static_cast <const CodeGenSchedModels &>(*this ).getProcModel (ModelDef));
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}
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// Iterate over the unique processor models.
@@ -529,14 +530,14 @@ class CodeGenSchedModels {
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const CodeGenSchedRW &getSchedRW (unsigned Idx, bool IsRead) const {
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return IsRead ? getSchedRead (Idx) : getSchedWrite (Idx);
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}
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- CodeGenSchedRW &getSchedRW (const Record *Def) {
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+ const CodeGenSchedRW &getSchedRW (const Record *Def) const {
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bool IsRead = Def->isSubClassOf (" SchedRead" );
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unsigned Idx = getSchedRWIdx (Def, IsRead);
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- return const_cast <CodeGenSchedRW &>(IsRead ? getSchedRead (Idx)
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- : getSchedWrite (Idx));
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+ return IsRead ? getSchedRead (Idx) : getSchedWrite (Idx);
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}
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- const CodeGenSchedRW &getSchedRW (const Record *Def) const {
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- return const_cast <CodeGenSchedModels &>(*this ).getSchedRW (Def);
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+ CodeGenSchedRW &getSchedRW (const Record *Def) {
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+ return const_cast <CodeGenSchedRW &>(
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+ static_cast <const CodeGenSchedModels &>(*this ).getSchedRW (Def));
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}
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unsigned getSchedRWIdx (const Record *Def, bool IsRead) const ;
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