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!fixup update remaining tests
1 parent 071392e commit b48b097

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3 files changed

+32
-21
lines changed

3 files changed

+32
-21
lines changed

‎llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -57,11 +57,12 @@ define void @pointer_induction_used_as_vector(ptr noalias %start.1, ptr noalias
5757
; CHECK-NEXT: [[TMP3:%.*]] = mul i64 [[TMP2]], 2
5858
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP3]]
5959
; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]
60+
; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
61+
; CHECK-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 2
6062
; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[N_VEC]], 8
6163
; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[START_1:%.*]], i64 [[TMP4]]
6264
; CHECK-NEXT: [[IND_END2:%.*]] = getelementptr i8, ptr [[START_2:%.*]], i64 [[N_VEC]]
63-
; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
64-
; CHECK-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 2
65+
6566
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
6667
; CHECK: vector.body:
6768
; CHECK-NEXT: [[POINTER_PHI:%.*]] = phi ptr [ [[START_2]], [[VECTOR_PH]] ], [ [[PTR_IND:%.*]], [[VECTOR_BODY]] ]
@@ -152,9 +153,9 @@ define void @pointer_induction(ptr noalias %start, i64 %N) {
152153
; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 2
153154
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], [[TMP4]]
154155
; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]
155-
; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[START:%.*]], i64 [[N_VEC]]
156156
; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
157157
; CHECK-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 2
158+
; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[START:%.*]], i64 [[N_VEC]]
158159
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
159160
; CHECK: vector.body:
160161
; CHECK-NEXT: [[POINTER_PHI:%.*]] = phi ptr [ [[START]], [[VECTOR_PH]] ], [ [[PTR_IND:%.*]], [[VECTOR_BODY]] ]

‎llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll

Lines changed: 20 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -64,6 +64,8 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
6464
; CHECK-NEXT: Successor(s): vector.ph
6565
; CHECK-EMPTY:
6666
; CHECK-NEXT: vector.ph:
67+
; CHECK-NEXT: vp<[[END1:%.+]]> = DERIVED-IV ir<%0> + vp<[[VEC_TC]]> * ir<-1>
68+
; CHECK-NEXT: vp<[[END2:%.+]]> = DERIVED-IV ir<%n> + vp<[[VEC_TC]]> * ir<-1>
6769
; CHECK-NEXT: Successor(s): vector loop
6870
; CHECK-EMPTY:
6971
; CHECK-NEXT: <x1> vector loop: {
@@ -92,11 +94,13 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
9294
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup.loopexit>, scalar.ph
9395
; CHECK-EMPTY:
9496
; CHECK-NEXT: scalar.ph:
97+
; CHECK-NEXT: EMIT vp<[[RESUME1:%.+]]> = resume-phi vp<[[END1]]>, ir<%0>
98+
; CHECK-NEXT: EMIT vp<[[RESUME2:%.+]]>.1 = resume-phi vp<[[END2]]>, ir<%n>
9599
; CHECK-NEXT: Successor(s): ir-bb<for.body>
96100
; CHECK-EMPTY:
97101
; CHECK-NEXT: ir-bb<for.body>:
98-
; CHECK-NEXT: IR %indvars.iv = phi i64 [ %0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
99-
; CHECK-NEXT: IR %i.0.in8 = phi i32 [ %n, %for.body.preheader ], [ %i.0, %for.body ]
102+
; CHECK-NEXT: IR %indvars.iv = phi i64 [ %0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] (extra operand: vp<[[RESUME1]]> from scalar.ph)
103+
; CHECK-NEXT: IR %i.0.in8 = phi i32 [ %n, %for.body.preheader ], [ %i.0, %for.body ] (extra operand: vp<[[RESUME2]]>.1 from scalar.ph)
100104
; CHECK: IR %indvars.iv.next = add nsw i64 %indvars.iv, -1
101105
; CHECK-NEXT: No successors
102106
; CHECK-EMPTY:
@@ -181,11 +185,10 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
181185
; CHECK-NEXT: IR %16 = mul i64 %15, 4
182186
; CHECK-NEXT: IR %n.mod.vf = urem i64 %0, %16
183187
; CHECK-NEXT: IR %n.vec = sub i64 %0, %n.mod.vf
184-
; CHECK-NEXT: IR %ind.end = sub i64 %0, %n.vec
185-
; CHECK-NEXT: IR %.cast = trunc i64 %n.vec to i32
186-
; CHECK-NEXT: IR %ind.end3 = sub i32 %n, %.cast
187188
; CHECK-NEXT: IR %17 = call i64 @llvm.vscale.i64()
188189
; CHECK-NEXT: IR %18 = mul i64 %17, 4
190+
; CHECK-NEXT: vp<[[END1:%.+]]> = DERIVED-IV ir<%0> + ir<[[VEC_TC]]> * ir<-1>
191+
; CHECK-NEXT: vp<[[END2:%.+]]> = DERIVED-IV ir<%n> + ir<[[VEC_TC]]> * ir<-1>
189192
; CHECK-NEXT: Successor(s): vector loop
190193
; CHECK-EMPTY:
191194
; CHECK-NEXT: <x1> vector loop: {
@@ -217,8 +220,8 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
217220
; CHECK-NEXT: No successors
218221
; CHECK-EMPTY:
219222
; CHECK-NEXT: ir-bb<scalar.ph>:
220-
; CHECK-NEXT: EMIT vp<[[RESUME_1:%.+]]> = resume-phi ir<%ind.end>, ir<%0>
221-
; CHECK-NEXT: EMIT vp<[[RESUME_2:%.+]]>.1 = resume-phi ir<%ind.end3>, ir<%n>
223+
; CHECK-NEXT: EMIT vp<[[RESUME_1:%.+]]> = resume-phi vp<[[END1]]>, ir<%0>
224+
; CHECK-NEXT: EMIT vp<[[RESUME_2:%.+]]>.1 = resume-phi vp<[[END2]]>, ir<%n>
222225
; CHECK-NEXT: Successor(s): ir-bb<for.body>
223226
; CHECK-EMPTY:
224227
; CHECK-NEXT: ir-bb<for.body>:
@@ -311,6 +314,8 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
311314
; CHECK-NEXT: Successor(s): vector.ph
312315
; CHECK-EMPTY:
313316
; CHECK-NEXT: vector.ph:
317+
; CHECK-NEXT: vp<[[END1:%.+]]> = DERIVED-IV ir<%0> + vp<[[VEC_TC]]> * ir<-1>
318+
; CHECK-NEXT: vp<[[END2:%.+]]> = DERIVED-IV ir<%n> + vp<[[VEC_TC]]> * ir<-1>
314319
; CHECK-NEXT: Successor(s): vector loop
315320
; CHECK-EMPTY:
316321
; CHECK-NEXT: <x1> vector loop: {
@@ -339,11 +344,13 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
339344
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup.loopexit>, scalar.ph
340345
; CHECK-EMPTY:
341346
; CHECK-NEXT: scalar.ph:
347+
; CHECK-NEXT: EMIT vp<[[RESUME1:%.+]]> = resume-phi vp<[[END1]]>, ir<%0>
348+
; CHECK-NEXT: EMIT vp<[[RESUME2:%.+]]>.1 = resume-phi vp<[[END2]]>, ir<%n>
342349
; CHECK-NEXT: Successor(s): ir-bb<for.body>
343350
; CHECK-EMPTY:
344351
; CHECK-NEXT: ir-bb<for.body>:
345-
; CHECK-NEXT: IR %indvars.iv = phi i64 [ %0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
346-
; CHECK-NEXT: IR %i.0.in8 = phi i32 [ %n, %for.body.preheader ], [ %i.0, %for.body ]
352+
; CHECK-NEXT: IR %indvars.iv = phi i64 [ %0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] (extra operand: vp<[[RESUME1]]> from scalar.ph)
353+
; CHECK-NEXT: IR %i.0.in8 = phi i32 [ %n, %for.body.preheader ], [ %i.0, %for.body ] (extra operand: vp<[[RESUME2]]>.1 from scalar.ph)
347354
; CHECK: IR %indvars.iv.next = add nsw i64 %indvars.iv, -1
348355
; CHECK-NEXT: No successors
349356
; CHECK-EMPTY:
@@ -428,11 +435,10 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
428435
; CHECK-NEXT: IR %16 = mul i64 %15, 4
429436
; CHECK-NEXT: IR %n.mod.vf = urem i64 %0, %16
430437
; CHECK-NEXT: IR %n.vec = sub i64 %0, %n.mod.vf
431-
; CHECK-NEXT: IR %ind.end = sub i64 %0, %n.vec
432-
; CHECK-NEXT: IR %.cast = trunc i64 %n.vec to i32
433-
; CHECK-NEXT: IR %ind.end3 = sub i32 %n, %.cast
434438
; CHECK-NEXT: IR %17 = call i64 @llvm.vscale.i64()
435439
; CHECK-NEXT: IR %18 = mul i64 %17, 4
440+
; CHECK-NEXT: vp<[[END1:%.+]]> = DERIVED-IV ir<%0> + ir<[[VEC_TC]]> * ir<-1>
441+
; CHECK-NEXT: vp<[[END2:%.+]]> = DERIVED-IV ir<%n> + ir<[[VEC_TC]]> * ir<-1>
436442
; CHECK-NEXT: Successor(s): vector loop
437443
; CHECK-EMPTY:
438444
; CHECK-NEXT: <x1> vector loop: {
@@ -464,8 +470,8 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
464470
; CHECK-NEXT: No successors
465471
; CHECK-EMPTY:
466472
; CHECK-NEXT: ir-bb<scalar.ph>:
467-
; CHECK-NEXT: EMIT vp<[[RESUME1:%.+]]> = resume-phi ir<%ind.end>, ir<%0>
468-
; CHECK-NEXT: EMIT vp<[[RESUME2:%.+]]>.1 = resume-phi ir<%ind.end3>, ir<%n>
473+
; CHECK-NEXT: EMIT vp<[[RESUME1:%.+]]> = resume-phi vp<[[END1]]>, ir<%0>
474+
; CHECK-NEXT: EMIT vp<[[RESUME2:%.+]]>.1 = resume-phi vp<[[END2]]>, ir<%n>
469475
; CHECK-NEXT: Successor(s): ir-bb<for.body>
470476
; CHECK-EMPTY:
471477
; CHECK-NEXT: ir-bb<for.body>:

‎llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -63,11 +63,12 @@ define i32 @reduction(ptr %a, i64 %n, i32 %start) {
6363
; IF-EVL-OUTLOOP-NEXT: Successor(s): ir-bb<for.end>, scalar.ph
6464
; IF-EVL-OUTLOOP-EMPTY:
6565
; IF-EVL-OUTLOOP-NEXT: scalar.ph:
66+
; IF-EVL-OUTLOOP-NEXT: EMIT vp<[[IV_RESUME:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
6667
; IF-EVL-OUTLOOP-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RDX]]>, ir<%start>
6768
; IF-EVL-OUTLOOP-NEXT: Successor(s): ir-bb<for.body>
6869
; IF-EVL-OUTLOOP-EMPTY:
6970
; IF-EVL-OUTLOOP-NEXT: ir-bb<for.body>:
70-
; IF-EVL-OUTLOOP-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
71+
; IF-EVL-OUTLOOP-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] (extra operand: vp<[[IV_RESUME]]> from scalar.ph)
7172
; IF-EVL-OUTLOOP-NEXT: IR %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ]
7273
; IF-EVL-OUTLOOP: IR %exitcond.not = icmp eq i64 %iv.next, %n
7374
; IF-EVL-OUTLOOP-NEXT: No successors
@@ -113,11 +114,12 @@ define i32 @reduction(ptr %a, i64 %n, i32 %start) {
113114
; IF-EVL-INLOOP-NEXT: Successor(s): ir-bb<for.end>, scalar.ph
114115
; IF-EVL-INLOOP-EMPTY:
115116
; IF-EVL-INLOOP-NEXT: scalar.ph:
117+
; IF-EVL-INLOOP-NEXT: EMIT vp<[[IV_RESUME:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
116118
; IF-EVL-INLOOP-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RDX]]>, ir<%start>
117119
; IF-EVL-INLOOP-NEXT: Successor(s): ir-bb<for.body>
118120
; IF-EVL-INLOOP-EMPTY:
119121
; IF-EVL-INLOOP-NEXT: ir-bb<for.body>:
120-
; IF-EVL-INLOOP-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
122+
; IF-EVL-INLOOP-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] (extra operand: vp<[[IV_RESUME]]> from scalar.ph)
121123
; IF-EVL-INLOOP-NEXT: IR %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ]
122124
; IF-EVL-INLOOP: IR %exitcond.not = icmp eq i64 %iv.next, %n
123125
; IF-EVL-INLOOP-NEXT: No successors
@@ -159,11 +161,12 @@ define i32 @reduction(ptr %a, i64 %n, i32 %start) {
159161
; NO-VP-OUTLOOP-NEXT: Successor(s): ir-bb<for.end>, scalar.ph
160162
; NO-VP-OUTLOOP-EMPTY:
161163
; NO-VP-OUTLOOP-NEXT: scalar.ph:
164+
; NO-VP-OUTLOOP-NEXT: EMIT vp<[[IV_RESUME:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
162165
; NO-VP-OUTLOOP-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RDX]]>, ir<%start>
163166
; NO-VP-OUTLOOP-NEXT: Successor(s): ir-bb<for.body>
164167
; NO-VP-OUTLOOP-EMPTY:
165168
; NO-VP-OUTLOOP-NEXT: ir-bb<for.body>:
166-
; NO-VP-OUTLOOP-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
169+
; NO-VP-OUTLOOP-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] (extra operand: vp<[[IV_RESUME]]> from scalar.ph)
167170
; NO-VP-OUTLOOP-NEXT: IR %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ]
168171
; NO-VP-OUTLOOP: IR %exitcond.not = icmp eq i64 %iv.next, %n
169172
; NO-VP-OUTLOOP-NEXT: No successors
@@ -205,11 +208,12 @@ define i32 @reduction(ptr %a, i64 %n, i32 %start) {
205208
; NO-VP-INLOOP-NEXT: Successor(s): ir-bb<for.end>, scalar.ph
206209
; NO-VP-INLOOP-EMPTY:
207210
; NO-VP-INLOOP-NEXT: scalar.ph:
211+
; NO-VP-INLOOP-NEXT: EMIT vp<[[IV_RESUME:%.+]]> = resume-phi vp<[[VTC]]>, ir<0>
208212
; NO-VP-INLOOP-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RDX]]>, ir<%start>
209213
; NO-VP-INLOOP-NEXT: Successor(s): ir-bb<for.body>
210214
; NO-VP-INLOOP-EMPTY:
211215
; NO-VP-INLOOP-NEXT: ir-bb<for.body>:
212-
; NO-VP-INLOOP-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
216+
; NO-VP-INLOOP-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] (extra operand: vp<[[IV_RESUME]]> from scalar.ph)
213217
; NO-VP-INLOOP-NEXT: IR %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ]
214218
; NO-VP-INLOOP: IR %exitcond.not = icmp eq i64 %iv.next, %n
215219
; NO-VP-INLOOP-NEXT: No successors

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