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[SelectOpt] Support BinOps with SExt operands.
Building on top of llvm#115489 extend support for binops with SExt operand.
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2 files changed

+115
-43
lines changed

2 files changed

+115
-43
lines changed

‎llvm/lib/CodeGen/SelectOptimize.cpp‎

Lines changed: 11 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -151,9 +151,9 @@ class SelectOptimizeImpl {
151151
case Instruction::Sub: {
152152
Value *X;
153153
if ((PatternMatch::match(I->getOperand(0),
154-
m_OneUse(m_ZExt(m_Value(X)))) ||
154+
m_OneUse(m_ZExtOrSExt(m_Value(X)))) ||
155155
PatternMatch::match(I->getOperand(1),
156-
m_OneUse(m_ZExt(m_Value(X))))) &&
156+
m_OneUse(m_ZExtOrSExt(m_Value(X))))) &&
157157
X->getType()->isIntegerTy(1))
158158
return SelectLike(I);
159159
break;
@@ -188,10 +188,10 @@ class SelectOptimizeImpl {
188188
if (auto *BO = dyn_cast<BinaryOperator>(I)) {
189189
Value *X;
190190
if (PatternMatch::match(BO->getOperand(0),
191-
m_OneUse(m_ZExt(m_Value(X)))))
191+
m_OneUse(m_ZExtOrSExt(m_Value(X)))))
192192
return X;
193193
if (PatternMatch::match(BO->getOperand(1),
194-
m_OneUse(m_ZExt(m_Value(X)))))
194+
m_OneUse(m_ZExtOrSExt(m_Value(X)))))
195195
return X;
196196
}
197197

@@ -238,10 +238,10 @@ class SelectOptimizeImpl {
238238
if (auto *BO = dyn_cast<BinaryOperator>(I)) {
239239
Value *X;
240240
if (PatternMatch::match(BO->getOperand(0),
241-
m_OneUse(m_ZExt(m_Value(X)))))
241+
m_OneUse(m_ZExtOrSExt(m_Value(X)))))
242242
return BO->getOperand(1);
243243
if (PatternMatch::match(BO->getOperand(1),
244-
m_OneUse(m_ZExt(m_Value(X)))))
244+
m_OneUse(m_ZExtOrSExt(m_Value(X)))))
245245
return BO->getOperand(0);
246246
}
247247

@@ -567,7 +567,11 @@ getTrueOrFalseValue(SelectOptimizeImpl::SelectLike SI, bool isTrue,
567567
"Only currently handling Add, Or and Sub instructions.");
568568
V = SI.getFalseValue();
569569
if (isTrue) {
570-
Constant *CI = ConstantInt::get(V->getType(), 1);
570+
bool HasSExt =
571+
(BinOp->getOperand(0) == V && isa<SExtInst>(BinOp->getOperand(1))) ||
572+
(BinOp->getOperand(1) == V && isa<SExtInst>(BinOp->getOperand(0)));
573+
Constant *CI = HasSExt ? ConstantInt::get(V->getType(), -1)
574+
: ConstantInt::get(V->getType(), 1);
571575
V = IB.CreateBinOp(BinOp->getOpcode(), V, CI);
572576
}
573577
}

‎llvm/test/CodeGen/AArch64/selectopt-cast.ll‎

Lines changed: 104 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -114,16 +114,22 @@ define void @test_add_sext(ptr %dst, ptr %src, i64 %j.start, i64 %p, i64 %i.star
114114
; CHECK-NEXT: entry:
115115
; CHECK-NEXT: br label [[LOOP:%.*]]
116116
; CHECK: loop:
117-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
118-
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
119-
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[LOOP]] ]
117+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[SELECT_END:%.*]] ]
118+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[SELECT_END]] ]
119+
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[SELECT_END]] ]
120120
; CHECK-NEXT: [[GEP_I:%.*]] = getelementptr inbounds ptr, ptr [[SRC:%.*]], i64 [[I]]
121121
; CHECK-NEXT: [[L_I:%.*]] = load ptr, ptr [[GEP_I]], align 8
122122
; CHECK-NEXT: [[GEP_J:%.*]] = getelementptr inbounds ptr, ptr [[SRC]], i64 [[J]]
123123
; CHECK-NEXT: [[L_J:%.*]] = load ptr, ptr [[GEP_J]], align 8
124124
; CHECK-NEXT: [[CMP3:%.*]] = icmp ult ptr [[L_I]], [[L_J]]
125125
; CHECK-NEXT: [[DEC:%.*]] = sext i1 [[CMP3]] to i64
126-
; CHECK-NEXT: [[J_NEXT]] = add nsw i64 [[J]], [[DEC]]
126+
; CHECK-NEXT: [[CMP3_FROZEN:%.*]] = freeze i1 [[CMP3]]
127+
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[J]], -1
128+
; CHECK-NEXT: br i1 [[CMP3_FROZEN]], label [[SELECT_END]], label [[SELECT_FALSE:%.*]]
129+
; CHECK: select.false:
130+
; CHECK-NEXT: br label [[SELECT_END]]
131+
; CHECK: select.end:
132+
; CHECK-NEXT: [[J_NEXT]] = phi i64 [ [[TMP0]], [[LOOP]] ], [ [[J]], [[SELECT_FALSE]] ]
127133
; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds ptr, ptr [[DST:%.*]], i64 [[IV]]
128134
; CHECK-NEXT: store i64 [[J_NEXT]], ptr [[GEP_DST]], align 8
129135
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
@@ -161,17 +167,23 @@ define void @test_add_sext_not(ptr %dst, ptr %src, i64 %j.start, i64 %p, i64 %i.
161167
; CHECK-NEXT: entry:
162168
; CHECK-NEXT: br label [[LOOP:%.*]]
163169
; CHECK: loop:
164-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
165-
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
166-
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[LOOP]] ]
170+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[SELECT_END:%.*]] ]
171+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[SELECT_END]] ]
172+
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[SELECT_END]] ]
167173
; CHECK-NEXT: [[GEP_I:%.*]] = getelementptr inbounds ptr, ptr [[SRC:%.*]], i64 [[I]]
168174
; CHECK-NEXT: [[L_I:%.*]] = load ptr, ptr [[GEP_I]], align 8
169175
; CHECK-NEXT: [[GEP_J:%.*]] = getelementptr inbounds ptr, ptr [[SRC]], i64 [[J]]
170176
; CHECK-NEXT: [[L_J:%.*]] = load ptr, ptr [[GEP_J]], align 8
171177
; CHECK-NEXT: [[CMP3:%.*]] = icmp ult ptr [[L_I]], [[L_J]]
172178
; CHECK-NEXT: [[NOT_CMP3:%.*]] = xor i1 [[CMP3]], true
173179
; CHECK-NEXT: [[DEC:%.*]] = sext i1 [[NOT_CMP3]] to i64
174-
; CHECK-NEXT: [[J_NEXT]] = add nsw i64 [[J]], [[DEC]]
180+
; CHECK-NEXT: [[NOT_CMP3_FROZEN:%.*]] = freeze i1 [[NOT_CMP3]]
181+
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[J]], -1
182+
; CHECK-NEXT: br i1 [[NOT_CMP3_FROZEN]], label [[SELECT_END]], label [[SELECT_FALSE:%.*]]
183+
; CHECK: select.false:
184+
; CHECK-NEXT: br label [[SELECT_END]]
185+
; CHECK: select.end:
186+
; CHECK-NEXT: [[J_NEXT]] = phi i64 [ [[TMP0]], [[LOOP]] ], [ [[J]], [[SELECT_FALSE]] ]
175187
; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds ptr, ptr [[DST:%.*]], i64 [[IV]]
176188
; CHECK-NEXT: store i64 [[J_NEXT]], ptr [[GEP_DST]], align 8
177189
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
@@ -210,18 +222,29 @@ define void @test_add_sext_not_and_regular_select(ptr %dst, ptr %src, i64 %j.sta
210222
; CHECK-NEXT: entry:
211223
; CHECK-NEXT: br label [[LOOP:%.*]]
212224
; CHECK: loop:
213-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
214-
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
215-
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[LOOP]] ]
225+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[SELECT_END1:%.*]] ]
226+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[SELECT_END1]] ]
227+
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[SELECT_END1]] ]
216228
; CHECK-NEXT: [[GEP_I:%.*]] = getelementptr inbounds ptr, ptr [[SRC:%.*]], i64 [[I]]
217229
; CHECK-NEXT: [[L_I:%.*]] = load ptr, ptr [[GEP_I]], align 8
218230
; CHECK-NEXT: [[GEP_J:%.*]] = getelementptr inbounds ptr, ptr [[SRC]], i64 [[J]]
219231
; CHECK-NEXT: [[L_J:%.*]] = load ptr, ptr [[GEP_J]], align 8
220232
; CHECK-NEXT: [[CMP3:%.*]] = icmp ult ptr [[L_I]], [[L_J]]
221233
; CHECK-NEXT: [[NOT_CMP3:%.*]] = xor i1 [[CMP3]], true
222234
; CHECK-NEXT: [[DEC:%.*]] = sext i1 [[NOT_CMP3]] to i64
223-
; CHECK-NEXT: [[J_NEXT]] = add nsw i64 [[J]], [[DEC]]
224-
; CHECK-NEXT: [[SINK:%.*]] = select i1 [[CMP3]], ptr [[L_I]], ptr [[L_J]]
235+
; CHECK-NEXT: [[NOT_CMP3_FROZEN:%.*]] = freeze i1 [[NOT_CMP3]]
236+
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[J]], -1
237+
; CHECK-NEXT: br i1 [[NOT_CMP3_FROZEN]], label [[SELECT_END:%.*]], label [[SELECT_FALSE:%.*]]
238+
; CHECK: select.false:
239+
; CHECK-NEXT: br label [[SELECT_END]]
240+
; CHECK: select.end:
241+
; CHECK-NEXT: [[J_NEXT]] = phi i64 [ [[TMP0]], [[LOOP]] ], [ [[J]], [[SELECT_FALSE]] ]
242+
; CHECK-NEXT: [[CMP3_FROZEN:%.*]] = freeze i1 [[CMP3]]
243+
; CHECK-NEXT: br i1 [[CMP3_FROZEN]], label [[SELECT_END1]], label [[SELECT_FALSE2:%.*]]
244+
; CHECK: select.false2:
245+
; CHECK-NEXT: br label [[SELECT_END1]]
246+
; CHECK: select.end1:
247+
; CHECK-NEXT: [[SINK:%.*]] = phi ptr [ [[L_I]], [[SELECT_END]] ], [ [[L_J]], [[SELECT_FALSE2]] ]
225248
; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds ptr, ptr [[DST:%.*]], i64 [[IV]]
226249
; CHECK-NEXT: store ptr [[SINK]], ptr [[GEP_DST]], align 8
227250
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
@@ -261,9 +284,9 @@ define void @test_add_sext_not_and_regular_select2(ptr %dst, ptr %src, i64 %j.st
261284
; CHECK-NEXT: entry:
262285
; CHECK-NEXT: br label [[LOOP:%.*]]
263286
; CHECK: loop:
264-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
265-
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
266-
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[LOOP]] ]
287+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[SELECT_END1:%.*]] ]
288+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[SELECT_END1]] ]
289+
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[SELECT_END1]] ]
267290
; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds ptr, ptr [[SRC:%.*]], i64 [[I]]
268291
; CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARRAYIDX1]], align 8
269292
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds ptr, ptr [[SRC]], i64 [[J]]
@@ -273,10 +296,21 @@ define void @test_add_sext_not_and_regular_select2(ptr %dst, ptr %src, i64 %j.st
273296
; CHECK-NEXT: [[ARRAYIDX1_I:%.*]] = getelementptr inbounds i64, ptr [[TMP1]], i64 [[P]]
274297
; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[ARRAYIDX1_I]], align 8
275298
; CHECK-NEXT: [[CMP3:%.*]] = icmp slt i64 [[TMP2]], [[TMP3]]
276-
; CHECK-NEXT: [[DOTSINK:%.*]] = select i1 [[CMP3]], ptr [[TMP0]], ptr [[TMP1]]
299+
; CHECK-NEXT: [[CMP3_FROZEN:%.*]] = freeze i1 [[CMP3]]
300+
; CHECK-NEXT: br i1 [[CMP3_FROZEN]], label [[SELECT_END:%.*]], label [[SELECT_FALSE:%.*]]
301+
; CHECK: select.false:
302+
; CHECK-NEXT: br label [[SELECT_END]]
303+
; CHECK: select.end:
304+
; CHECK-NEXT: [[DOTSINK:%.*]] = phi ptr [ [[TMP0]], [[LOOP]] ], [ [[TMP1]], [[SELECT_FALSE]] ]
277305
; CHECK-NEXT: [[NOT_CMP3:%.*]] = xor i1 [[CMP3]], true
278306
; CHECK-NEXT: [[DEC:%.*]] = sext i1 [[NOT_CMP3]] to i64
279-
; CHECK-NEXT: [[J_NEXT]] = add nsw i64 [[J]], [[DEC]]
307+
; CHECK-NEXT: [[NOT_CMP3_FROZEN:%.*]] = freeze i1 [[NOT_CMP3]]
308+
; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[J]], -1
309+
; CHECK-NEXT: br i1 [[NOT_CMP3_FROZEN]], label [[SELECT_END1]], label [[SELECT_FALSE2:%.*]]
310+
; CHECK: select.false2:
311+
; CHECK-NEXT: br label [[SELECT_END1]]
312+
; CHECK: select.end1:
313+
; CHECK-NEXT: [[J_NEXT]] = phi i64 [ [[TMP5]], [[SELECT_END]] ], [ [[J]], [[SELECT_FALSE2]] ]
280314
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds ptr, ptr [[DST:%.*]], i64 [[IV]]
281315
; CHECK-NEXT: store ptr [[DOTSINK]], ptr [[TMP4]], align 8
282316
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
@@ -427,16 +461,22 @@ define void @test_sub_sext(ptr %dst, ptr %src, i64 %j.start, i64 %p, i64 %i.star
427461
; CHECK-NEXT: entry:
428462
; CHECK-NEXT: br label [[LOOP:%.*]]
429463
; CHECK: loop:
430-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
431-
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
432-
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[LOOP]] ]
464+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[SELECT_END:%.*]] ]
465+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[SELECT_END]] ]
466+
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[SELECT_END]] ]
433467
; CHECK-NEXT: [[GEP_I:%.*]] = getelementptr inbounds ptr, ptr [[SRC:%.*]], i64 [[I]]
434468
; CHECK-NEXT: [[L_I:%.*]] = load ptr, ptr [[GEP_I]], align 8
435469
; CHECK-NEXT: [[GEP_J:%.*]] = getelementptr inbounds ptr, ptr [[SRC]], i64 [[J]]
436470
; CHECK-NEXT: [[L_J:%.*]] = load ptr, ptr [[GEP_J]], align 8
437471
; CHECK-NEXT: [[CMP3:%.*]] = icmp ult ptr [[L_I]], [[L_J]]
438472
; CHECK-NEXT: [[DEC:%.*]] = sext i1 [[CMP3]] to i64
439-
; CHECK-NEXT: [[J_NEXT]] = sub nsw i64 [[J]], [[DEC]]
473+
; CHECK-NEXT: [[CMP3_FROZEN:%.*]] = freeze i1 [[CMP3]]
474+
; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[J]], -1
475+
; CHECK-NEXT: br i1 [[CMP3_FROZEN]], label [[SELECT_END]], label [[SELECT_FALSE:%.*]]
476+
; CHECK: select.false:
477+
; CHECK-NEXT: br label [[SELECT_END]]
478+
; CHECK: select.end:
479+
; CHECK-NEXT: [[J_NEXT]] = phi i64 [ [[TMP0]], [[LOOP]] ], [ [[J]], [[SELECT_FALSE]] ]
440480
; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds ptr, ptr [[DST:%.*]], i64 [[IV]]
441481
; CHECK-NEXT: store i64 [[J_NEXT]], ptr [[GEP_DST]], align 8
442482
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
@@ -474,17 +514,23 @@ define void @test_sub_sext_not(ptr %dst, ptr %src, i64 %j.start, i64 %p, i64 %i.
474514
; CHECK-NEXT: entry:
475515
; CHECK-NEXT: br label [[LOOP:%.*]]
476516
; CHECK: loop:
477-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
478-
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
479-
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[LOOP]] ]
517+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[SELECT_END:%.*]] ]
518+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[SELECT_END]] ]
519+
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[SELECT_END]] ]
480520
; CHECK-NEXT: [[GEP_I:%.*]] = getelementptr inbounds ptr, ptr [[SRC:%.*]], i64 [[I]]
481521
; CHECK-NEXT: [[L_I:%.*]] = load ptr, ptr [[GEP_I]], align 8
482522
; CHECK-NEXT: [[GEP_J:%.*]] = getelementptr inbounds ptr, ptr [[SRC]], i64 [[J]]
483523
; CHECK-NEXT: [[L_J:%.*]] = load ptr, ptr [[GEP_J]], align 8
484524
; CHECK-NEXT: [[CMP3:%.*]] = icmp ult ptr [[L_I]], [[L_J]]
485525
; CHECK-NEXT: [[NOT_CMP3:%.*]] = xor i1 [[CMP3]], true
486526
; CHECK-NEXT: [[DEC:%.*]] = sext i1 [[NOT_CMP3]] to i64
487-
; CHECK-NEXT: [[J_NEXT]] = sub nsw i64 [[J]], [[DEC]]
527+
; CHECK-NEXT: [[NOT_CMP3_FROZEN:%.*]] = freeze i1 [[NOT_CMP3]]
528+
; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[J]], -1
529+
; CHECK-NEXT: br i1 [[NOT_CMP3_FROZEN]], label [[SELECT_END]], label [[SELECT_FALSE:%.*]]
530+
; CHECK: select.false:
531+
; CHECK-NEXT: br label [[SELECT_END]]
532+
; CHECK: select.end:
533+
; CHECK-NEXT: [[J_NEXT]] = phi i64 [ [[TMP0]], [[LOOP]] ], [ [[J]], [[SELECT_FALSE]] ]
488534
; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds ptr, ptr [[DST:%.*]], i64 [[IV]]
489535
; CHECK-NEXT: store i64 [[J_NEXT]], ptr [[GEP_DST]], align 8
490536
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
@@ -523,18 +569,29 @@ define void @test_sub_sext_not_and_regular_select(ptr %dst, ptr %src, i64 %j.sta
523569
; CHECK-NEXT: entry:
524570
; CHECK-NEXT: br label [[LOOP:%.*]]
525571
; CHECK: loop:
526-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
527-
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
528-
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[LOOP]] ]
572+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[SELECT_END1:%.*]] ]
573+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[SELECT_END1]] ]
574+
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[SELECT_END1]] ]
529575
; CHECK-NEXT: [[GEP_I:%.*]] = getelementptr inbounds ptr, ptr [[SRC:%.*]], i64 [[I]]
530576
; CHECK-NEXT: [[L_I:%.*]] = load ptr, ptr [[GEP_I]], align 8
531577
; CHECK-NEXT: [[GEP_J:%.*]] = getelementptr inbounds ptr, ptr [[SRC]], i64 [[J]]
532578
; CHECK-NEXT: [[L_J:%.*]] = load ptr, ptr [[GEP_J]], align 8
533579
; CHECK-NEXT: [[CMP3:%.*]] = icmp ult ptr [[L_I]], [[L_J]]
534580
; CHECK-NEXT: [[NOT_CMP3:%.*]] = xor i1 [[CMP3]], true
535581
; CHECK-NEXT: [[DEC:%.*]] = sext i1 [[NOT_CMP3]] to i64
536-
; CHECK-NEXT: [[J_NEXT]] = sub nsw i64 [[J]], [[DEC]]
537-
; CHECK-NEXT: [[SINK:%.*]] = select i1 [[CMP3]], ptr [[L_I]], ptr [[L_J]]
582+
; CHECK-NEXT: [[NOT_CMP3_FROZEN:%.*]] = freeze i1 [[NOT_CMP3]]
583+
; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[J]], -1
584+
; CHECK-NEXT: br i1 [[NOT_CMP3_FROZEN]], label [[SELECT_END:%.*]], label [[SELECT_FALSE:%.*]]
585+
; CHECK: select.false:
586+
; CHECK-NEXT: br label [[SELECT_END]]
587+
; CHECK: select.end:
588+
; CHECK-NEXT: [[J_NEXT]] = phi i64 [ [[TMP0]], [[LOOP]] ], [ [[J]], [[SELECT_FALSE]] ]
589+
; CHECK-NEXT: [[CMP3_FROZEN:%.*]] = freeze i1 [[CMP3]]
590+
; CHECK-NEXT: br i1 [[CMP3_FROZEN]], label [[SELECT_END1]], label [[SELECT_FALSE2:%.*]]
591+
; CHECK: select.false2:
592+
; CHECK-NEXT: br label [[SELECT_END1]]
593+
; CHECK: select.end1:
594+
; CHECK-NEXT: [[SINK:%.*]] = phi ptr [ [[L_I]], [[SELECT_END]] ], [ [[L_J]], [[SELECT_FALSE2]] ]
538595
; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds ptr, ptr [[DST:%.*]], i64 [[IV]]
539596
; CHECK-NEXT: store ptr [[SINK]], ptr [[GEP_DST]], align 8
540597
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
@@ -574,9 +631,9 @@ define void @test_sub_sext_not_and_regular_select2(ptr %dst, ptr %src, i64 %j.st
574631
; CHECK-NEXT: entry:
575632
; CHECK-NEXT: br label [[LOOP:%.*]]
576633
; CHECK: loop:
577-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
578-
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
579-
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[LOOP]] ]
634+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[SELECT_END1:%.*]] ]
635+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[HIGH:%.*]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[SELECT_END1]] ]
636+
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_START:%.*]], [[ENTRY]] ], [ [[J_NEXT]], [[SELECT_END1]] ]
580637
; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds ptr, ptr [[SRC:%.*]], i64 [[I]]
581638
; CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARRAYIDX1]], align 8
582639
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds ptr, ptr [[SRC]], i64 [[J]]
@@ -586,10 +643,21 @@ define void @test_sub_sext_not_and_regular_select2(ptr %dst, ptr %src, i64 %j.st
586643
; CHECK-NEXT: [[ARRAYIDX1_I:%.*]] = getelementptr inbounds i64, ptr [[TMP1]], i64 [[P]]
587644
; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[ARRAYIDX1_I]], align 8
588645
; CHECK-NEXT: [[CMP3:%.*]] = icmp slt i64 [[TMP2]], [[TMP3]]
589-
; CHECK-NEXT: [[DOTSINK:%.*]] = select i1 [[CMP3]], ptr [[TMP0]], ptr [[TMP1]]
646+
; CHECK-NEXT: [[CMP3_FROZEN:%.*]] = freeze i1 [[CMP3]]
647+
; CHECK-NEXT: br i1 [[CMP3_FROZEN]], label [[SELECT_END:%.*]], label [[SELECT_FALSE:%.*]]
648+
; CHECK: select.false:
649+
; CHECK-NEXT: br label [[SELECT_END]]
650+
; CHECK: select.end:
651+
; CHECK-NEXT: [[DOTSINK:%.*]] = phi ptr [ [[TMP0]], [[LOOP]] ], [ [[TMP1]], [[SELECT_FALSE]] ]
590652
; CHECK-NEXT: [[NOT_CMP3:%.*]] = xor i1 [[CMP3]], true
591653
; CHECK-NEXT: [[DEC:%.*]] = sext i1 [[NOT_CMP3]] to i64
592-
; CHECK-NEXT: [[J_NEXT]] = sub nsw i64 [[J]], [[DEC]]
654+
; CHECK-NEXT: [[NOT_CMP3_FROZEN:%.*]] = freeze i1 [[NOT_CMP3]]
655+
; CHECK-NEXT: [[TMP5:%.*]] = sub i64 [[J]], -1
656+
; CHECK-NEXT: br i1 [[NOT_CMP3_FROZEN]], label [[SELECT_END1]], label [[SELECT_FALSE2:%.*]]
657+
; CHECK: select.false2:
658+
; CHECK-NEXT: br label [[SELECT_END1]]
659+
; CHECK: select.end1:
660+
; CHECK-NEXT: [[J_NEXT]] = phi i64 [ [[TMP5]], [[SELECT_END]] ], [ [[J]], [[SELECT_FALSE2]] ]
593661
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds ptr, ptr [[DST:%.*]], i64 [[IV]]
594662
; CHECK-NEXT: store ptr [[DOTSINK]], ptr [[TMP4]], align 8
595663
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1

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