@@ -394,22 +394,18 @@ define void @scev_exp_reuse_const_add(ptr %dst, ptr %src) {
394394; CHECK-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]]) {
395395; CHECK-NEXT: [[ENTRY:.*]]:
396396; CHECK-NEXT: [[SRC2:%.*]] = ptrtoint ptr [[SRC]] to i64
397- ; CHECK-NEXT: [[DST1:%.*]] = ptrtoint ptr [[DST]] to i64
398397; CHECK-NEXT: br label %[[LOOP_1:.*]]
399398; CHECK: [[LOOP_1]]:
400- ; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], %[[LOOP_1]] ], [ 0, %[[ENTRY]] ]
401399; CHECK-NEXT: [[PTR_IV_1:%.*]] = phi ptr [ [[DST]], %[[ENTRY]] ], [ [[PTR_IV_1_NEXT:%.*]], %[[LOOP_1]] ]
402400; CHECK-NEXT: [[PTR_IV_1_NEXT]] = getelementptr i8, ptr [[PTR_IV_1]], i64 2
403401; CHECK-NEXT: [[C:%.*]] = call i1 @cond()
404- ; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
405402; CHECK-NEXT: br i1 [[C]], label %[[LOOP_2_PH:.*]], label %[[LOOP_1]]
406403; CHECK: [[LOOP_2_PH]]:
407- ; CHECK-NEXT: [[INDVAR_LCSSA:%.*]] = phi i64 [ [[INDVAR]], %[[LOOP_1]] ]
408404; CHECK-NEXT: [[PTR_IV_1_NEXT_LCSSA:%.*]] = phi ptr [ [[PTR_IV_1_NEXT]], %[[LOOP_1]] ]
409405; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
410406; CHECK: [[VECTOR_MEMCHECK]]:
411- ; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[DST1]] , [[SRC2]]
412- ; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDVAR_LCSSA]], 1
407+ ; CHECK-NEXT: [[TMP0:%.*]] = sub i64 -2 , [[SRC2]]
408+ ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PTR_IV_1_NEXT_LCSSA]] to i64
413409; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], [[TMP0]]
414410; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], 4
415411; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
@@ -433,11 +429,11 @@ define void @scev_exp_reuse_const_add(ptr %dst, ptr %src) {
433429; CHECK-NEXT: br i1 false, label %[[EXIT:.*]], label %[[SCALAR_PH]]
434430; CHECK: [[SCALAR_PH]]:
435431; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 40, %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_2_PH]] ], [ 0, %[[VECTOR_MEMCHECK]] ]
436- ; CHECK-NEXT: [[BC_RESUME_VAL3 :%.*]] = phi ptr [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ [[PTR_IV_1_NEXT_LCSSA]], %[[LOOP_2_PH]] ], [ [[PTR_IV_1_NEXT_LCSSA]], %[[VECTOR_MEMCHECK]] ]
432+ ; CHECK-NEXT: [[BC_RESUME_VAL2 :%.*]] = phi ptr [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ [[PTR_IV_1_NEXT_LCSSA]], %[[LOOP_2_PH]] ], [ [[PTR_IV_1_NEXT_LCSSA]], %[[VECTOR_MEMCHECK]] ]
437433; CHECK-NEXT: br label %[[LOOP_2:.*]]
438434; CHECK: [[LOOP_2]]:
439435; CHECK-NEXT: [[IV_1:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_2_NEXT:%.*]], %[[LOOP_2]] ]
440- ; CHECK-NEXT: [[PTR_IV_2:%.*]] = phi ptr [ [[BC_RESUME_VAL3 ]], %[[SCALAR_PH]] ], [ [[PTR_IV_2_NEXT:%.*]], %[[LOOP_2]] ]
436+ ; CHECK-NEXT: [[PTR_IV_2:%.*]] = phi ptr [ [[BC_RESUME_VAL2 ]], %[[SCALAR_PH]] ], [ [[PTR_IV_2_NEXT:%.*]], %[[LOOP_2]] ]
441437; CHECK-NEXT: [[IV_2_NEXT]] = add i64 [[IV_1]], 1
442438; CHECK-NEXT: [[GEP_SRC_1:%.*]] = getelementptr i16, ptr [[SRC]], i64 [[IV_2_NEXT]]
443439; CHECK-NEXT: [[L:%.*]] = load i16, ptr [[GEP_SRC_1]], align 2
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