tests: arm: runtime nmi testcase is flushing DCACHE

On mcu with Data Cache, when it is enabled (CONFIG_DCACHE=y),
the DCACHE must be flushed after the NMI loop to trig all
the irq, else the last one is missing.

Signed-off-by: Francois Ramu <[email protected]>

Author: FRASTM

tests/arch/arm/arm_runtime_nmi/src/arm_runtime_nmi.c

@@ -61,6 +61,12 @@ void test_arm_runtime_nmi(void)
 	/* Trigger NMI: Should fire immediately */
 	SCB->ICSR |= SCB_ICSR_NMIPENDSET_Msk;
 
+#ifdef ARM_CACHEL1_ARMV7_H
+	/* Flush Data Cache now if enabled */
+	if (IS_ENABLED(CONFIG_DCACHE)) {
+		SCB_CleanDCache();
+	}
+#endif /* ARM_CACHEL1_ARMV7_H */
 	zassert_true(nmi_triggered, "Isr not triggered!\n");
 }
 /**