feat: AMD support larger extended function entries

Removed the extended function entry normalisation step from AMD CPUs.
We will now pass through the value provided by KVM or set through a CPU
template. This now mirrors the behaviour of Intel. On newer AMD chips
and newer kernels we are now able to pass through features which were
previously out of range.

Signed-off-by: Jack Thomson <[email protected]>

Author: JackThomson2

docs/cpu_templates/cpuid-normalization.md

@@ -42,13 +42,12 @@ See also: [boot protocol settings](boot-protocol.md)
 
 ## AMD-specifc CPUID normalization
 
-| Description                                          |                Leaf                | Subleaf |      Register      | Bits  |
-| ---------------------------------------------------- | :--------------------------------: | :-----: | :----------------: | :---: |
-| Set IA32_ARCH_CAPABILITIES MSR as not present        |                0x7                 |    -    |        EDX         |  29   |
-| Update largest extended function entry to 0x8000001f |             0x80000000             |    -    |        EAX         | 31:0  |
-| Set topology extension bit                           |             0x80000001             |    -    |        ECX         |  22   |
-| Update brand string with a default AMD value         | 0x80000002, 0x80000003, 0x80000004 |    -    | EAX, EBX, ECX, EDX |  all  |
-| Update number of physical threads                    |             0x80000008             |    -    |        ECX         |  7:0  |
-| Update APIC ID size                                  |             0x80000008             |    -    |        ECX         | 15:12 |
-| Update cache topology information                    |             0x8000001d             |   all   |        all         |  all  |
-| Update extended APIC ID                              |             0x8000001e             |    -    |   EAX, EBX, ECX    |  all  |
+| Description                                   |                Leaf                | Subleaf |      Register      | Bits  |
+| --------------------------------------------- | :--------------------------------: | :-----: | :----------------: | :---: |
+| Set IA32_ARCH_CAPABILITIES MSR as not present |                0x7                 |    -    |        EDX         |  29   |
+| Set topology extension bit                    |             0x80000001             |    -    |        ECX         |  22   |
+| Update brand string with a default AMD value  | 0x80000002, 0x80000003, 0x80000004 |    -    | EAX, EBX, ECX, EDX |  all  |
+| Update number of physical threads             |             0x80000008             |    -    |        ECX         |  7:0  |
+| Update APIC ID size                           |             0x80000008             |    -    |        ECX         | 15:12 |
+| Update cache topology information             |             0x8000001d             |   all   |        all         |  all  |
+| Update extended APIC ID                       |             0x8000001e             |    -    |   EAX, EBX, ECX    |  all  |

src/vmm/src/cpu_config/x86_64/cpuid/amd/normalize.rs

@@ -104,7 +104,6 @@ impl super::AmdCpuid {
     ) -> Result<(), NormalizeCpuidError> {
         self.passthrough_cache_topology()?;
         self.update_structured_extended_entry()?;
-        self.update_largest_extended_fn_entry()?;
         self.update_extended_feature_fn_entry()?;
         self.update_amd_feature_entry(cpu_count)?;
         self.update_extended_cache_topology_entry(cpu_count, cpus_per_core)?;
@@ -181,23 +180,6 @@ impl super::AmdCpuid {
         Ok(())
     }
 
-    /// Update largest extended fn entry.
-    #[allow(clippy::unwrap_used, clippy::unwrap_in_result)]
-    fn update_largest_extended_fn_entry(&mut self) -> Result<(), NormalizeCpuidError> {
-        // KVM sets the largest extended function to 0x80000000. Change it to 0x8000001f
-        // Since we also use the leaf 0x8000001d (Extended Cache Topology).
-        let leaf_80000000 = self
-            .get_mut(&CpuidKey::leaf(0x80000000))
-            .ok_or(NormalizeCpuidError::MissingLeaf0x80000000)?;
-
-        // Largest extended function. The largest CPUID extended function input value supported by
-        // the processor implementation.
-        //
-        // l_func_ext: 0..32,
-        set_range(&mut leaf_80000000.result.eax, 0..32, 0x8000_001f).unwrap();
-        Ok(())
-    }
-
     /// Updated extended feature fn entry.
     fn update_extended_feature_fn_entry(&mut self) -> Result<(), NormalizeCpuidError> {
         // set the Topology Extension bit since we use the Extended Cache Topology leaf

tests/data/cpu_template_helper/fingerprint_AMD_MILAN_6.1host.json

@@ -543,7 +543,7 @@
         "modifiers": [
           {
             "register": "eax",
-            "bitmap": "0b10000000000000000000000000011111"
+            "bitmap": "0b10000000000000000000000000100001"
           },
           {
             "register": "ebx",
@@ -1546,4 +1546,4 @@
       }
     ]
   }
-}
+}

tests/integration_tests/functional/test_cpu_template_helper.py

@@ -146,13 +146,14 @@ def build_cpu_config_dict(cpu_config_path):
     # https://github.com/torvalds/linux/commit/8765d75329a386dd7742f94a1ea5fdcdea8d93d0
     (0x8000001B, 0x0),
     (0x8000001C, 0x0),
-    (0x8000001F, 0x0),
     # CPUID.80860000h is a Transmeta-specific leaf.
     (0x80860000, 0x0),
     # CPUID.C0000000h is a Centaur-specific leaf.
     (0xC0000000, 0x0),
 ]
 
+# An upper range of CPUID leaves which are not supported by our kernels
+UNAVAILABLE_CPUID_UPPER_RANGE = range(0x8000001F, 0x80000029)
 
 # Dictionary of CPUID bitmasks that should not be tested due to its mutability.
 CPUID_EXCEPTION_LIST = {
@@ -281,6 +282,8 @@ def test_cpu_config_dump_vs_actual(
     for key, actual in actual_cpu_config["cpuid"].items():
         if (key[0], key[1]) in UNAVAILABLE_CPUID_ON_DUMP_LIST:
             continue
+        if key[0] in UNAVAILABLE_CPUID_UPPER_RANGE:
+            continue
         if key not in dump_cpu_config["cpuid"]:
             keys_not_in_dump[key] = actual_cpu_config["cpuid"][key]
             continue