doc: Be more specific to supported CPU models for CPU templates

We are going to add a new Intel CPU (Sapphire Rapids). But the existing
CPU templates cannot be used on Sapphire Rapids. The reason is as
follows. Sapphire Rapids supports a wider CPUID range. To adapt the
existing templates to Sapphire Rapids, they have to mask CPUID bits off
on the new CPUID range. However, if such a CPU template is applied on
older CPUs that don't have the new CPUID range, Firecracker exits with
an error. This error is intentional because the CPU template feature has
the great power of tweaking very low layer stuff and fail-close is
preferable.

Signed-off-by: Takahiro Itazuri <[email protected]>

Author: zulinx86

docs/cpu_templates/cpu-templates.md

@@ -48,14 +48,14 @@ Firecracker supports two types of CPU templates:
 
 At the moment the following set of static CPU templates are supported:
 
-| CPU template | CPU vendor | CPU model             |
-| ------------ | ---------- | --------------------- |
-| C3           | Intel      | any                   |
-| T2           | Intel      | any                   |
-| T2A          | AMD        | Milan                 |
-| T2CL         | Intel      | Cascade Lake or newer |
-| T2S          | Intel      | any                   |
-| V1N1         | ARM        | Neoverse V1           |
+| CPU template | CPU vendor | CPU model                       |
+| ------------ | ---------- | ------------------------------- |
+| C3           | Intel      | Skylake, Cascade Lake, Ice Lake |
+| T2           | Intel      | Skylake, Cascade Lake, Ice Lake |
+| T2A          | AMD        | Milan                           |
+| T2CL         | Intel      | Cascade Lake, Ice Lake          |
+| T2S          | Intel      | Skylake, Cascade Lake           |
+| V1N1         | ARM        | Neoverse V1                     |
 
 T2 and C3 templates are mapped as close as possible to AWS T2 and C3 instances
 in terms of CPU features. Note that on a microVM that is lauched with the C3
@@ -72,7 +72,7 @@ Firecracker expects the host to always be running the latest version of the
 microcode.
 
 The T2CL template is mapped to be close to Intel Cascade Lake. It is not safe to
-use it on Intel CPUs older than Cascade Lake (such as Skylake).
+use it on Intel CPUs other than Cascade Lake and Ice Lake.
 
 The only AMD template is T2A. It is considered safe to be used with AMD Milan.