fix(vmm): Change T2A to set EferLmsleUnsupported to 1

(cherry picked from commit fa1e2ab)

CPUID.0x80000008:EBX[20] (EferLmsleUnsupported) indicates that
EFER[LMSLE] is not supported. As described in AMD64 APM vol.2,
EFER[LMSLE] has already been deprecated and is not suported by all
processor implementations (including m6a.metal).

KVM allows nested virtualization guests to write EFER[LMSLE] only for
very specific software (SLES11 version of Xen 4.0 to boot nested SVM).
On non-nested virtualized guests, writing to EFER[LMSLE] generates #GP
which is identical to behavior on CPUs where the EferLmsleUnsupported
bit is set to 1. As T2A template disables SVM, it is safer and better to
let guests know that writing to EFER[LMSLE] is not supported.

As a side note, to revert the upstream commit allowing it on nested
virtualized guests, some discussions were made but was cut off in the
middle.

Signed-off-by: Takahiro Itazuri <[email protected]>

Author: zulinx86

CHANGELOG.md

@@ -36,6 +36,8 @@
   update.
 - Fixed passing through cache information from host in CPUID leaf 0x80000005.
 - Fixed the T2A CPU template to disable SVM (nested virtualization).
+- Fixed the T2A CPU template to set EferLmsleUnsupported bit
+  (CPUID.80000008h:EBX[20]), which indicates that EFER[LMSLE] is not supported.
 
 ## [1.3.0]
 

resources/tests/static_cpu_templates/t2a.json

@@ -82,7 +82,7 @@
       "modifiers": [
         {
           "register": "ebx",
-          "bitmap": "0bxxxxxxxxxxxx11xxxxxxxx0xxxxxx0x0"
+          "bitmap": "0bxxxxxxxxxxx111xxxxxxxx0xxxxxx0x0"
         }
       ]
     }

src/vmm/src/cpu_config/x86_64/static_cpu_templates/t2a.rs

@@ -121,8 +121,8 @@ pub fn t2a() -> CustomCpuTemplate {
                 modifiers: vec![CpuidRegisterModifier {
                     register: CpuidRegister::Ebx,
                     bitmap: RegisterValueFilter {
-                        filter: 0b00000000000011000000001000000101,
-                        value: 0b00000000000011000000000000000000,
+                        filter: 0b00000000000111000000001000000101,
+                        value: 0b00000000000111000000000000000000,
                     },
                 }],
             },