x86_64/regs: fixed kvm_set_sregs issue

We fixed the setup of special registers in the vCPUs according to the
IA-32e specification. Despite using the 32-bit entry point, we start
executing guest code in 64-bit mode. According to the specification
(see Intel SDM vol. 3, sec. 9.8.5) the following steps are required:

(1) Starting from protected mode, disable paging by setting CR0.PG = 0;

(2) Enable physical-address extensions (PAE) by setting CR4.PAE = 1;

(3) Load CR3 with the physical base address of the Level 4 page map
table (PML4);

(4) Enable IA-32e mode by setting IA32_EFER.LME = 1;

(5) Enable paging by setting CR0.PG = 1. This causes the processor to
set the IA32_EFER.LMA bit to 1.

Step (1) isn't required since we're not performing a transition but
we're setting up the special registers such that we start in 64-bit
mode right away.

Step (2) and (3) are already performed by setup_page_tables().

Step (4) is already performed by configure_segments_and_sregs().

Step (5) is already partially performed by setup_page_tables();
however, setting IA32_EFER.LMA is missing.

Commit f29810335965 ("KVM/x86: Check input paging mode when cs.l is
set") in Linux v4.15 improves KVM to honor the specification (the
commit has been backported to Linux v4.14.y since it could cause
unexpected behavior). This broke our loader, and we fixed it to honor
the specification by adding IA32_EFER.LMA = 1.

Signed-off-by: Alexandru Agache <[email protected]>

Author: alexandruag

x86_64/src/regs.rs

@@ -167,6 +167,7 @@ const X86_CR0_PE: u64 = 0x1;
 const X86_CR0_PG: u64 = 0x80000000;
 const X86_CR4_PAE: u64 = 0x20;
 
+const EFER_LMA: u64 = 0x400;
 const EFER_LME: u64 = 0x100;
 
 const BOOT_GDT_OFFSET: usize = 0x500;
@@ -225,7 +226,7 @@ fn configure_segments_and_sregs(mem: &GuestMemory, sregs: &mut kvm_sregs) -> Res
 
     /* 64-bit protected mode */
     sregs.cr0 |= X86_CR0_PE;
-    sregs.efer |= EFER_LME;
+    sregs.efer |= EFER_LME | EFER_LMA;
 
     Ok(())
 }