ARM64: Decrease the sizes of some values

These values can be changed to smaller types without causing problems.

I've done this in a separate commit because my dev setup doesn't use
ARM. In case something ARM-specific breaks in CI, I'd like to be able to
keep those changes in their own commit so I can debug more easily.

Signed-off-by: Jonathan Browne <[email protected]>

Author: JBYoshi

src/vmm/src/arch/aarch64/cache_info.rs

@@ -37,7 +37,7 @@ pub(crate) struct CacheEntry {
     pub level: u8,
     // Type of cache: Unified, Data, Instruction.
     pub type_: CacheType,
-    pub size_: Option<usize>,
+    pub size_: Option<u32>,
     pub number_of_sets: Option<u16>,
     pub line_size: Option<u16>,
     // How many CPUS share this cache.
@@ -211,12 +211,12 @@ fn readln_special<T: AsRef<Path>>(file_path: &T) -> Result<String, CacheInfoErro
     Ok(line.trim_end().to_string())
 }
 
-fn to_bytes(cache_size_pretty: &mut String) -> Result<usize, CacheInfoError> {
+fn to_bytes(cache_size_pretty: &mut String) -> Result<u32, CacheInfoError> {
     match cache_size_pretty.pop() {
-        Some('K') => Ok(cache_size_pretty.parse::<usize>().map_err(|err| {
+        Some('K') => Ok(cache_size_pretty.parse::<u32>().map_err(|err| {
             CacheInfoError::InvalidCacheAttr("size".to_string(), err.to_string())
         })? * 1024),
-        Some('M') => Ok(cache_size_pretty.parse::<usize>().map_err(|err| {
+        Some('M') => Ok(cache_size_pretty.parse::<u32>().map_err(|err| {
             CacheInfoError::InvalidCacheAttr("size".to_string(), err.to_string())
         })? * 1024
             * 1024),

src/vmm/src/arch/aarch64/fdt.rs

@@ -142,7 +142,7 @@ fn create_cpu_nodes(fdt: &mut FdtWriter, vcpu_mpidr: &[u64]) -> Result<(), FdtEr
             // https://github.com/devicetree-org/devicetree-specification/releases/download/v0.3/devicetree-specification-v0.3.pdf,
             // section 3.8.
             if let Some(size) = cache.size_ {
-                fdt.property_u32(cache.type_.of_cache_size(), size as u32)?;
+                fdt.property_u32(cache.type_.of_cache_size(), size)?;
             }
             if let Some(line_size) = cache.line_size {
                 fdt.property_u32(cache.type_.of_cache_line_size(), u32::from(line_size))?;
@@ -189,7 +189,7 @@ fn create_cpu_nodes(fdt: &mut FdtWriter, vcpu_mpidr: &[u64]) -> Result<(), FdtEr
                 fdt.property_string("compatible", "cache")?;
                 fdt.property_u32("cache-level", u32::from(cache.level))?;
                 if let Some(size) = cache.size_ {
-                    fdt.property_u32(cache.type_.of_cache_size(), size as u32)?;
+                    fdt.property_u32(cache.type_.of_cache_size(), size)?;
                 }
                 if let Some(line_size) = cache.line_size {
                     fdt.property_u32(cache.type_.of_cache_line_size(), u32::from(line_size))?;

src/vmm/src/arch/aarch64/layout.rs

@@ -52,7 +52,7 @@
 /// Start of RAM on 64 bit ARM.
 pub const DRAM_MEM_START: u64 = 0x8000_0000; // 2 GB.
 /// The maximum RAM size.
-pub const DRAM_MEM_MAX_SIZE: u64 = 0x00FF_8000_0000; // 1024 - 2 = 1022G.
+pub const DRAM_MEM_MAX_SIZE: usize = 0x00FF_8000_0000; // 1024 - 2 = 1022G.
 
 /// Kernel command line maximum size.
 /// As per `arch/arm64/include/uapi/asm/setup.h`.

src/vmm/src/arch/aarch64/mod.rs

@@ -40,7 +40,7 @@ pub const MMIO_MEM_SIZE: u64 = layout::DRAM_MEM_START - layout::MAPPED_IO_START;
 /// Returns a Vec of the valid memory addresses for aarch64.
 /// See [`layout`](layout) module for a drawing of the specific memory model for this platform.
 pub fn arch_memory_regions(size: usize) -> Vec<(GuestAddress, usize)> {
-    let dram_size = min(size as u64, layout::DRAM_MEM_MAX_SIZE) as usize;
+    let dram_size = min(size, layout::DRAM_MEM_MAX_SIZE);
     vec![(GuestAddress(layout::DRAM_MEM_START), dram_size)]
 }
 

src/vmm/src/arch/aarch64/regs.rs

@@ -136,27 +136,27 @@ pub enum RegSize {
 
 impl RegSize {
     /// Size of u8 register in bytes
-    pub const U8_SIZE: u64 = 1;
+    pub const U8_SIZE: usize = 1;
     /// Size of u16 register in bytes
-    pub const U16_SIZE: u64 = 2;
+    pub const U16_SIZE: usize = 2;
     /// Size of u32 register in bytes
-    pub const U32_SIZE: u64 = 4;
+    pub const U32_SIZE: usize = 4;
     /// Size of u64 register in bytes
-    pub const U64_SIZE: u64 = 8;
+    pub const U64_SIZE: usize = 8;
     /// Size of u128 register in bytes
-    pub const U128_SIZE: u64 = 16;
+    pub const U128_SIZE: usize = 16;
     /// Size of u256 register in bytes
-    pub const U256_SIZE: u64 = 32;
+    pub const U256_SIZE: usize = 32;
     /// Size of u512 register in bytes
-    pub const U512_SIZE: u64 = 64;
+    pub const U512_SIZE: usize = 64;
     /// Size of u1024 register in bytes
-    pub const U1024_SIZE: u64 = 128;
+    pub const U1024_SIZE: usize = 128;
     /// Size of u2048 register in bytes
-    pub const U2048_SIZE: u64 = 256;
+    pub const U2048_SIZE: usize = 256;
 }
 
-impl From<u64> for RegSize {
-    fn from(value: u64) -> Self {
+impl From<usize> for RegSize {
+    fn from(value: usize) -> Self {
         match value {
             RegSize::U8_SIZE => RegSize::U8,
             RegSize::U16_SIZE => RegSize::U16,
@@ -172,7 +172,7 @@ impl From<u64> for RegSize {
     }
 }
 
-impl From<RegSize> for u64 {
+impl From<RegSize> for usize {
     fn from(value: RegSize) -> Self {
         match value {
             RegSize::U8 => RegSize::U8_SIZE,
@@ -189,8 +189,8 @@ impl From<RegSize> for u64 {
 }
 
 /// Returns register size in bytes
-pub fn reg_size(reg_id: u64) -> u64 {
-    2_u64.pow(((reg_id & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT) as u32)
+pub fn reg_size(reg_id: u64) -> usize {
+    2_usize.pow(((reg_id & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT) as u32)
 }
 
 /// Storage for aarch64 registers with different sizes.
@@ -294,7 +294,7 @@ impl Versionize for Aarch64RegisterVec {
         Self: Sized,
     {
         let inner = Aarch64RegisterVecInner::deserialize(reader, version_map, source_version)?;
-        let mut total_size: u64 = 0;
+        let mut total_size: usize = 0;
         for id in inner.ids.iter() {
             let reg_size = reg_size(*id);
             if RegSize::U2048_SIZE < reg_size {
@@ -306,7 +306,7 @@ impl Versionize for Aarch64RegisterVec {
             }
             total_size += reg_size;
         }
-        if total_size as usize != inner.data.len() {
+        if total_size != inner.data.len() {
             Err(VersionizeError::Deserialize(
                 "Failed to deserialize aarch64 registers. Sum of registers sizes is not equal to \
                  registers data length"
@@ -337,7 +337,7 @@ impl<'a> Iterator for Aarch64RegisterVecIterator<'a> {
     fn next(&mut self) -> Option<Self::Item> {
         if self.index < self.ids.len() {
             let id = self.ids[self.index];
-            let reg_size = reg_size(id) as usize;
+            let reg_size = reg_size(id);
             let reg_ref = Aarch64RegisterRef {
                 id,
                 data: &self.data[self.offset..self.offset + reg_size],
@@ -366,7 +366,7 @@ impl<'a> Iterator for Aarch64RegisterVecIteratorMut<'a> {
     fn next(&mut self) -> Option<Self::Item> {
         if self.index < self.ids.len() {
             let id = self.ids[self.index];
-            let reg_size = reg_size(id) as usize;
+            let reg_size = reg_size(id);
 
             let data = std::mem::take(&mut self.data);
             let (head, tail) = data.split_at_mut(reg_size);
@@ -396,7 +396,7 @@ impl<'a> Aarch64RegisterRef<'a> {
     /// will panic.
     pub fn new(id: u64, data: &'a [u8]) -> Self {
         assert_eq!(
-            reg_size(id) as usize,
+            reg_size(id),
             data.len(),
             "Attempt to create a register reference with incompatible id and data length"
         );
@@ -438,7 +438,7 @@ impl<'a> Aarch64RegisterRefMut<'a> {
     /// will panic.
     pub fn new(id: u64, data: &'a mut [u8]) -> Self {
         assert_eq!(
-            reg_size(id) as usize,
+            reg_size(id),
             data.len(),
             "Attempt to create a register reference with incompatible id and data length"
         );