fix: add MSR_TSC_RATE to the MSR_EXCEPTION_LIST

Now this MSR is host only and not available in the guest.
Check AMD reference manual at "SVM Revision and Feature Identification"
section for more information.

Signed-off-by: Egor Lazarchuk <[email protected]>

Author: ShadowCurse

tests/integration_tests/functional/test_cpu_template_helper.py

@@ -173,7 +173,8 @@ def build_cpu_config_dict(cpu_config_path):
 }
 
 
-# List of MSR indices that should not be tested due to its mutability.
+# List of MSR indices that should not be tested due to its mutability or inavailablility
+# in the guest.
 MSR_EXCEPTION_LIST = [
     # MSR_KVM_WALL_CLOCK and MSR_KVM_SYSTEM_TIME depend on the elapsed time.
     0x11,
@@ -221,6 +222,10 @@ def build_cpu_config_dict(cpu_config_path):
     # MSR_AMD64_VIRT_SPEC_CTRL is R/W and can be modified by OS to control
     # security features for speculative attacks.
     0xC001011F,
+    # Not available in the guest
+    # MSR_TSC_RATE is a Time Stamp Counter Ratio which allows the hypervisor
+    # to control the guest's view of the Time Stamp Counter.
+    0xC0000104,
 ]