From 2b74e94f3335525a649458f5e456b31b4d245c27 Mon Sep 17 00:00:00 2001 From: Takahiro Itazuri Date: Tue, 8 Apr 2025 08:20:53 +0000 Subject: [PATCH 1/8] chore: Use uppercase for custom CPU templates While we use uppercase for static CPU templates (and have to do so to follow the API specification), we used lowercase for custom CPU templates. Using uppercase for both will make integration tests that support both types simpler. Signed-off-by: Takahiro Itazuri --- .../src/cpu_config/aarch64/static_cpu_templates/mod.rs | 2 +- .../src/cpu_config/x86_64/static_cpu_templates/mod.rs | 10 +++++----- ..._sve_and_pac.json => AARCH64_WITH_SVE_AND_PAC.json} | 0 tests/data/custom_cpu_templates/{c3.json => C3.json} | 0 tests/data/custom_cpu_templates/{t2.json => T2.json} | 0 tests/data/custom_cpu_templates/{t2a.json => T2A.json} | 0 .../data/custom_cpu_templates/{t2cl.json => T2CL.json} | 0 tests/data/custom_cpu_templates/{t2s.json => T2S.json} | 0 .../data/custom_cpu_templates/{v1n1.json => V1N1.json} | 0 tests/framework/microvm.py | 4 ++-- tests/framework/utils_cpu_templates.py | 10 +++++----- .../functional/test_cpu_features_aarch64.py | 8 ++++---- .../integration_tests/security/test_vulnerabilities.py | 4 ++-- 13 files changed, 19 insertions(+), 19 deletions(-) rename tests/data/custom_cpu_templates/{aarch64_with_sve_and_pac.json => AARCH64_WITH_SVE_AND_PAC.json} (100%) rename tests/data/custom_cpu_templates/{c3.json => C3.json} (100%) rename tests/data/custom_cpu_templates/{t2.json => T2.json} (100%) rename tests/data/custom_cpu_templates/{t2a.json => T2A.json} (100%) rename tests/data/custom_cpu_templates/{t2cl.json => T2CL.json} (100%) rename tests/data/custom_cpu_templates/{t2s.json => T2S.json} (100%) rename tests/data/custom_cpu_templates/{v1n1.json => V1N1.json} (100%) diff --git a/src/vmm/src/cpu_config/aarch64/static_cpu_templates/mod.rs b/src/vmm/src/cpu_config/aarch64/static_cpu_templates/mod.rs index 0e1277c4514..45381c673ba 100644 --- a/src/vmm/src/cpu_config/aarch64/static_cpu_templates/mod.rs +++ b/src/vmm/src/cpu_config/aarch64/static_cpu_templates/mod.rs @@ -39,7 +39,7 @@ mod tests { #[test] fn verify_consistency_with_json_templates() { - let static_templates = [(v1n1::v1n1(), "v1n1.json")]; + let static_templates = [(v1n1::v1n1(), "V1N1.json")]; for (hardcoded_template, filename) in static_templates { let json_template = get_json_template(filename); diff --git a/src/vmm/src/cpu_config/x86_64/static_cpu_templates/mod.rs b/src/vmm/src/cpu_config/x86_64/static_cpu_templates/mod.rs index a978be8fd16..3966de6296c 100644 --- a/src/vmm/src/cpu_config/x86_64/static_cpu_templates/mod.rs +++ b/src/vmm/src/cpu_config/x86_64/static_cpu_templates/mod.rs @@ -84,11 +84,11 @@ mod tests { #[test] fn verify_consistency_with_json_templates() { let static_templates = [ - (c3::c3(), "c3.json"), - (t2::t2(), "t2.json"), - (t2s::t2s(), "t2s.json"), - (t2cl::t2cl(), "t2cl.json"), - (t2a::t2a(), "t2a.json"), + (c3::c3(), "C3.json"), + (t2::t2(), "T2.json"), + (t2s::t2s(), "T2S.json"), + (t2cl::t2cl(), "T2CL.json"), + (t2a::t2a(), "T2A.json"), ]; for (hardcoded_template, filename) in static_templates { diff --git a/tests/data/custom_cpu_templates/aarch64_with_sve_and_pac.json b/tests/data/custom_cpu_templates/AARCH64_WITH_SVE_AND_PAC.json similarity index 100% rename from tests/data/custom_cpu_templates/aarch64_with_sve_and_pac.json rename to tests/data/custom_cpu_templates/AARCH64_WITH_SVE_AND_PAC.json diff --git a/tests/data/custom_cpu_templates/c3.json b/tests/data/custom_cpu_templates/C3.json similarity index 100% rename from tests/data/custom_cpu_templates/c3.json rename to tests/data/custom_cpu_templates/C3.json diff --git a/tests/data/custom_cpu_templates/t2.json b/tests/data/custom_cpu_templates/T2.json similarity index 100% rename from tests/data/custom_cpu_templates/t2.json rename to tests/data/custom_cpu_templates/T2.json diff --git a/tests/data/custom_cpu_templates/t2a.json b/tests/data/custom_cpu_templates/T2A.json similarity index 100% rename from tests/data/custom_cpu_templates/t2a.json rename to tests/data/custom_cpu_templates/T2A.json diff --git a/tests/data/custom_cpu_templates/t2cl.json b/tests/data/custom_cpu_templates/T2CL.json similarity index 100% rename from tests/data/custom_cpu_templates/t2cl.json rename to tests/data/custom_cpu_templates/T2CL.json diff --git a/tests/data/custom_cpu_templates/t2s.json b/tests/data/custom_cpu_templates/T2S.json similarity index 100% rename from tests/data/custom_cpu_templates/t2s.json rename to tests/data/custom_cpu_templates/T2S.json diff --git a/tests/data/custom_cpu_templates/v1n1.json b/tests/data/custom_cpu_templates/V1N1.json similarity index 100% rename from tests/data/custom_cpu_templates/v1n1.json rename to tests/data/custom_cpu_templates/V1N1.json diff --git a/tests/framework/microvm.py b/tests/framework/microvm.py index 9ee3c85b0bb..b49727bffc7 100644 --- a/tests/framework/microvm.py +++ b/tests/framework/microvm.py @@ -802,11 +802,11 @@ def set_cpu_template(self, cpu_template): # static CPU template if isinstance(cpu_template, str): self.api.machine_config.patch(cpu_template=cpu_template) - self.cpu_template_name = cpu_template.lower() + self.cpu_template_name = cpu_template # custom CPU template elif isinstance(cpu_template, dict): self.api.cpu_config.put(**cpu_template["template"]) - self.cpu_template_name = cpu_template["name"].lower() + self.cpu_template_name = cpu_template["name"] def add_drive( self, diff --git a/tests/framework/utils_cpu_templates.py b/tests/framework/utils_cpu_templates.py index 804fd99c755..30a16638627 100644 --- a/tests/framework/utils_cpu_templates.py +++ b/tests/framework/utils_cpu_templates.py @@ -55,13 +55,13 @@ def get_supported_custom_cpu_templates(): case CpuVendor.AMD, CpuModel.AMD_MILAN: return AMD_TEMPLATES case CpuVendor.ARM, CpuModel.ARM_NEOVERSE_N1 if host_linux >= (6, 1): - return ["v1n1"] + return ["V1N1"] case CpuVendor.ARM, CpuModel.ARM_NEOVERSE_V1 if host_linux >= (6, 1): - return ["v1n1", "aarch64_with_sve_and_pac"] + return ["V1N1", "AARCH64_WITH_SVE_AND_PAC"] case CpuVendor.ARM, CpuModel.ARM_NEOVERSE_V1: - return ["aarch64_with_sve_and_pac"] + return ["AARCH64_WITH_SVE_AND_PAC"] case CpuVendor.ARM, CpuModel.ARM_NEOVERSE_V2: - return ["aarch64_with_sve_and_pac"] + return ["AARCH64_WITH_SVE_AND_PAC"] case _: return [] @@ -69,7 +69,7 @@ def get_supported_custom_cpu_templates(): def custom_cpu_templates_params(): """Return Custom CPU templates as pytest parameters""" for name in sorted(get_supported_custom_cpu_templates()): - tmpl = Path(f"./data/custom_cpu_templates/{name.lower()}.json") + tmpl = Path(f"./data/custom_cpu_templates/{name}.json") yield pytest.param( {"name": name, "template": json.loads(tmpl.read_text("utf-8"))}, id="custom_" + name, diff --git a/tests/integration_tests/functional/test_cpu_features_aarch64.py b/tests/integration_tests/functional/test_cpu_features_aarch64.py index ab59f79c706..50d2b776aae 100644 --- a/tests/integration_tests/functional/test_cpu_features_aarch64.py +++ b/tests/integration_tests/functional/test_cpu_features_aarch64.py @@ -37,21 +37,21 @@ def test_guest_cpu_features(uvm_any): vm = uvm_any expected_cpu_features = set() match global_props.cpu_model, vm.cpu_template_name: - case CpuModel.ARM_NEOVERSE_N1, "v1n1": + case CpuModel.ARM_NEOVERSE_N1, "V1N1": expected_cpu_features = G2_FEATS case CpuModel.ARM_NEOVERSE_N1, None: expected_cpu_features = G2_FEATS # [cm]7g with guest kernel 5.10 and later - case CpuModel.ARM_NEOVERSE_V1, "v1n1": + case CpuModel.ARM_NEOVERSE_V1, "V1N1": expected_cpu_features = G2_FEATS - case CpuModel.ARM_NEOVERSE_V1, "aarch64_with_sve_and_pac": + case CpuModel.ARM_NEOVERSE_V1, "AARCH64_WITH_SVE_AND_PAC": expected_cpu_features = G3_FEATS | G3_SVE_AND_PAC case CpuModel.ARM_NEOVERSE_V1, None: expected_cpu_features = G3_FEATS case CpuModel.ARM_NEOVERSE_V2, None: expected_cpu_features = G4_FEATS - case CpuModel.ARM_NEOVERSE_V2, "aarch64_with_sve_and_pac": + case CpuModel.ARM_NEOVERSE_V2, "AARCH64_WITH_SVE_AND_PAC": expected_cpu_features = G4_FEATS | G4_SVE_AND_PAC guest_feats = set(vm.ssh.check_output(CPU_FEATURES_CMD).stdout.split()) diff --git a/tests/integration_tests/security/test_vulnerabilities.py b/tests/integration_tests/security/test_vulnerabilities.py index 356bdb4370f..0c2ea2d256f 100644 --- a/tests/integration_tests/security/test_vulnerabilities.py +++ b/tests/integration_tests/security/test_vulnerabilities.py @@ -166,9 +166,9 @@ def get_vuln_files_exception_dict(template): # Since those bits are not set on Intel Skylake and C3 template makes guests pretend to be AWS # C3 instance (quite old processor now) by overwriting CPUID.1H:EAX, it is impossible to avoid # this "Unknown" state. - if global_props.cpu_codename == "INTEL_SKYLAKE" and template == "c3": + if global_props.cpu_codename == "INTEL_SKYLAKE" and template == "C3": exception_dict["mmio_stale_data"] = "Unknown: No mitigations" - elif global_props.cpu_codename == "INTEL_SKYLAKE" or template == "t2s": + elif global_props.cpu_codename == "INTEL_SKYLAKE" or template == "T2S": exception_dict["mmio_stale_data"] = "Clear CPU buffers" return exception_dict From 850586ec6492caf354a408ef0d9a442b0f39af4a Mon Sep 17 00:00:00 2001 From: Takahiro Itazuri Date: Tue, 8 Apr 2025 10:09:51 +0000 Subject: [PATCH 2/8] refactor(test): Utility to get CPU template name We do the same thing in multiple places. Signed-off-by: Takahiro Itazuri --- tests/conftest.py | 10 ++++------ tests/framework/microvm.py | 6 +++--- tests/framework/utils_cpu_templates.py | 9 +++++++++ .../functional/test_cpu_features_aarch64.py | 6 +++--- .../functional/test_cpu_features_x86_64.py | 20 +++++-------------- .../functional/test_snapshot_phase1.py | 5 ++--- .../security/test_vulnerabilities.py | 2 +- 7 files changed, 27 insertions(+), 31 deletions(-) diff --git a/tests/conftest.py b/tests/conftest.py index bfc6c6cedd7..943cb561df5 100644 --- a/tests/conftest.py +++ b/tests/conftest.py @@ -38,6 +38,7 @@ from framework.properties import global_props from framework.utils_cpu_templates import ( custom_cpu_templates_params, + get_cpu_template_name, static_cpu_templates_params, ) from host_tools.metrics import get_metrics_logger @@ -361,12 +362,9 @@ def custom_cpu_template(request, record_property): ) def cpu_template_any(request, record_property): """This fixture combines no template, static and custom CPU templates""" - cpu_template_name = request.param - if request.param is None: - cpu_template_name = "None" - elif "name" in request.param: - cpu_template_name = request.param["name"] - record_property("cpu_template", cpu_template_name) + record_property( + "cpu_template", get_cpu_template_name(request.param, with_type=True) + ) return request.param diff --git a/tests/framework/microvm.py b/tests/framework/microvm.py index b49727bffc7..c8d984a81c9 100644 --- a/tests/framework/microvm.py +++ b/tests/framework/microvm.py @@ -37,6 +37,7 @@ from framework.jailer import JailerContext from framework.microvm_helpers import MicrovmHelpers from framework.properties import global_props +from framework.utils_cpu_templates import get_cpu_template_name from framework.utils_drive import VhostUserBlkBackend, VhostUserBlkBackendType from framework.utils_uffd import spawn_pf_handler, uffd_handler from host_tools.fcmetrics import FCMetricsMonitor @@ -248,7 +249,7 @@ def __init__( self.disks_vhost_user = {} self.vcpus_count = None self.mem_size_bytes = None - self.cpu_template_name = None + self.cpu_template_name = "None" # The given custom CPU template will be set in basic_config() but could # be overwritten via set_cpu_template(). self.custom_cpu_template = custom_cpu_template @@ -797,16 +798,15 @@ def basic_config( def set_cpu_template(self, cpu_template): """Set guest CPU template.""" + self.cpu_template_name = get_cpu_template_name(cpu_template) if cpu_template is None: return # static CPU template if isinstance(cpu_template, str): self.api.machine_config.patch(cpu_template=cpu_template) - self.cpu_template_name = cpu_template # custom CPU template elif isinstance(cpu_template, dict): self.api.cpu_config.put(**cpu_template["template"]) - self.cpu_template_name = cpu_template["name"] def add_drive( self, diff --git a/tests/framework/utils_cpu_templates.py b/tests/framework/utils_cpu_templates.py index 30a16638627..830ad72b1f0 100644 --- a/tests/framework/utils_cpu_templates.py +++ b/tests/framework/utils_cpu_templates.py @@ -80,3 +80,12 @@ def static_cpu_templates_params(): """Return Static CPU templates as pytest parameters""" for name in sorted(get_supported_cpu_templates()): yield pytest.param(name, id="static_" + name) + + +def get_cpu_template_name(cpu_template, with_type=False): + """Return the CPU template name.""" + if isinstance(cpu_template, str): + return ("static_" if with_type else "") + cpu_template + if isinstance(cpu_template, dict): + return ("custom_" if with_type else "") + cpu_template["name"] + return "None" diff --git a/tests/integration_tests/functional/test_cpu_features_aarch64.py b/tests/integration_tests/functional/test_cpu_features_aarch64.py index 50d2b776aae..6afdb92f676 100644 --- a/tests/integration_tests/functional/test_cpu_features_aarch64.py +++ b/tests/integration_tests/functional/test_cpu_features_aarch64.py @@ -39,7 +39,7 @@ def test_guest_cpu_features(uvm_any): match global_props.cpu_model, vm.cpu_template_name: case CpuModel.ARM_NEOVERSE_N1, "V1N1": expected_cpu_features = G2_FEATS - case CpuModel.ARM_NEOVERSE_N1, None: + case CpuModel.ARM_NEOVERSE_N1, "None": expected_cpu_features = G2_FEATS # [cm]7g with guest kernel 5.10 and later @@ -47,9 +47,9 @@ def test_guest_cpu_features(uvm_any): expected_cpu_features = G2_FEATS case CpuModel.ARM_NEOVERSE_V1, "AARCH64_WITH_SVE_AND_PAC": expected_cpu_features = G3_FEATS | G3_SVE_AND_PAC - case CpuModel.ARM_NEOVERSE_V1, None: + case CpuModel.ARM_NEOVERSE_V1, "None": expected_cpu_features = G3_FEATS - case CpuModel.ARM_NEOVERSE_V2, None: + case CpuModel.ARM_NEOVERSE_V2, "None": expected_cpu_features = G4_FEATS case CpuModel.ARM_NEOVERSE_V2, "AARCH64_WITH_SVE_AND_PAC": expected_cpu_features = G4_FEATS | G4_SVE_AND_PAC diff --git a/tests/integration_tests/functional/test_cpu_features_x86_64.py b/tests/integration_tests/functional/test_cpu_features_x86_64.py index bd8c5daba54..69a45a635ba 100644 --- a/tests/integration_tests/functional/test_cpu_features_x86_64.py +++ b/tests/integration_tests/functional/test_cpu_features_x86_64.py @@ -21,7 +21,7 @@ from framework import utils from framework.defs import SUPPORTED_HOST_KERNELS from framework.properties import global_props -from framework.utils_cpu_templates import SUPPORTED_CPU_TEMPLATES +from framework.utils_cpu_templates import get_cpu_template_name PLATFORM = platform.machine() UNSUPPORTED_HOST_KERNEL = ( @@ -77,16 +77,6 @@ def _check_extended_cache_features(vm): assert cache_size > 0 -def get_cpu_template_dir(cpu_template): - """ - Utility function to return a valid string which will be used as - name of the directory where snapshot artifacts are stored during - snapshot test and loaded from during restore test. - - """ - return cpu_template if cpu_template else "none" - - def skip_test_based_on_artifacts(snapshot_artifacts_dir): """ It is possible that some X template is not supported on @@ -431,7 +421,7 @@ def test_cpu_wrmsr_snapshot(microvm_factory, guest_kernel, rootfs, msr_cpu_templ snapshot_artifacts_dir = ( Path(shared_names["snapshot_artifacts_root_dir_wrmsr"]) / guest_kernel.name - / (msr_cpu_template if msr_cpu_template else "none") + / get_cpu_template_name(msr_cpu_template, with_type=True) ) clean_and_mkdir(snapshot_artifacts_dir) @@ -499,7 +489,7 @@ def test_cpu_wrmsr_restore(microvm_factory, msr_cpu_template, guest_kernel): """ shared_names = SNAPSHOT_RESTORE_SHARED_NAMES - cpu_template_dir = msr_cpu_template if msr_cpu_template else "none" + cpu_template_dir = get_cpu_template_name(msr_cpu_template, with_type=True) snapshot_artifacts_dir = ( Path(shared_names["snapshot_artifacts_root_dir_wrmsr"]) / guest_kernel.name @@ -567,7 +557,7 @@ def test_cpu_cpuid_snapshot(microvm_factory, guest_kernel, rootfs, msr_cpu_templ vm.start() # Dump CPUID to a file that will be published to S3 for the 2nd part of the test - cpu_template_dir = get_cpu_template_dir(msr_cpu_template) + cpu_template_dir = get_cpu_template_name(msr_cpu_template, with_type=True) snapshot_artifacts_dir = ( Path(shared_names["snapshot_artifacts_root_dir_cpuid"]) / guest_kernel.name @@ -619,7 +609,7 @@ def test_cpu_cpuid_restore(microvm_factory, guest_kernel, msr_cpu_template): """ shared_names = SNAPSHOT_RESTORE_SHARED_NAMES - cpu_template_dir = get_cpu_template_dir(msr_cpu_template) + cpu_template_dir = get_cpu_template_name(msr_cpu_template, with_type=True) snapshot_artifacts_dir = ( Path(shared_names["snapshot_artifacts_root_dir_cpuid"]) / guest_kernel.name diff --git a/tests/integration_tests/functional/test_snapshot_phase1.py b/tests/integration_tests/functional/test_snapshot_phase1.py index 7436c19d875..2e7d72ddf18 100644 --- a/tests/integration_tests/functional/test_snapshot_phase1.py +++ b/tests/integration_tests/functional/test_snapshot_phase1.py @@ -16,6 +16,7 @@ generate_mmds_get_request, generate_mmds_session_token, ) +from framework.utils_cpu_templates import get_cpu_template_name if platform.machine() != "x86_64": pytestmark = pytest.mark.skip("only x86_64 architecture supported") @@ -36,13 +37,10 @@ def test_snapshot_phase1( vm.add_net_iface() static_cpu_template = None - cpu_template_name = "None" if isinstance(cpu_template_any, str): static_cpu_template = cpu_template_any - cpu_template_name = f"static_{cpu_template_any}" elif isinstance(cpu_template_any, dict): vm.api.cpu_config.put(**cpu_template_any["template"]) - cpu_template_name = f"custom_{cpu_template_any['name']}" vm.basic_config( vcpu_count=2, mem_size_mib=512, @@ -50,6 +48,7 @@ def test_snapshot_phase1( ) guest_kernel_version = re.search("vmlinux-(.*)", vm.kernel_file.name) + cpu_template_name = get_cpu_template_name(cpu_template_any, with_type=True) snapshot_artifacts_dir = ( results_dir / f"{guest_kernel_version.group(1)}_{cpu_template_name}_guest_snapshot" diff --git a/tests/integration_tests/security/test_vulnerabilities.py b/tests/integration_tests/security/test_vulnerabilities.py index 0c2ea2d256f..0e530123255 100644 --- a/tests/integration_tests/security/test_vulnerabilities.py +++ b/tests/integration_tests/security/test_vulnerabilities.py @@ -87,7 +87,7 @@ def expected_vulnerabilities(self, cpu_template_name): """ if ( global_props.cpu_codename in ["INTEL_ICELAKE", "INTEL_SAPPHIRE_RAPIDS"] - and cpu_template_name is None + and cpu_template_name == "None" ): return { '{"NAME": "REPTAR", "CVE": "CVE-2023-23583", "VULNERABLE": true, "INFOS": "Your microcode is too old to mitigate the vulnerability"}' From b70e15a3c4dbacfab331a3de48129c7bed58da44 Mon Sep 17 00:00:00 2001 From: Takahiro Itazuri Date: Tue, 8 Apr 2025 10:55:19 +0000 Subject: [PATCH 3/8] test: Cover custom CPU templates in test_cpu_features_x86_64.py The tests defined in test_cpu_features_x86_64.py only supported static CPU templates. Static CPU template feature was deprecated a while ago and will be removed in v2.0 and custom CPu template feature is the alternative preferred option. Test custom CPU templates as well. Note that this change does not mean supporting more CPU templates than before. It just covers both types of CPU templates, so there are still filters for CPU templates supported by the test as they are. Signed-off-by: Takahiro Itazuri --- .../functional/test_cpu_features_x86_64.py | 77 ++++++++++--------- 1 file changed, 41 insertions(+), 36 deletions(-) diff --git a/tests/integration_tests/functional/test_cpu_features_x86_64.py b/tests/integration_tests/functional/test_cpu_features_x86_64.py index 69a45a635ba..856f79f09c4 100644 --- a/tests/integration_tests/functional/test_cpu_features_x86_64.py +++ b/tests/integration_tests/functional/test_cpu_features_x86_64.py @@ -253,19 +253,10 @@ def test_brand_string(uvm_plain_any): MSR_SUPPORTED_TEMPLATES = ["T2A", "T2CL", "T2S"] -@pytest.fixture( - name="msr_cpu_template", - params=sorted(set(SUPPORTED_CPU_TEMPLATES).intersection(MSR_SUPPORTED_TEMPLATES)), -) -def msr_cpu_template_fxt(request): - """CPU template fixture for MSR read/write supported CPU templates""" - return request.param - - @pytest.mark.timeout(900) @pytest.mark.nonci def test_cpu_rdmsr( - microvm_factory, msr_cpu_template, guest_kernel, rootfs, results_dir + microvm_factory, cpu_template_any, guest_kernel, rootfs, results_dir ): """ Test MSRs that are available to the guest. @@ -298,14 +289,16 @@ def test_cpu_rdmsr( - All supported guest kernels and rootfs - Microvm: 1vCPU with 1024 MB RAM """ + cpu_template_name = get_cpu_template_name(cpu_template_any) + if cpu_template_name not in MSR_SUPPORTED_TEMPLATES: + pytest.skip(f"This test does not support {cpu_template_name} template.") vcpus, guest_mem_mib = 1, 1024 vm = microvm_factory.build(guest_kernel, rootfs, monitor_memory=False) vm.spawn() vm.add_net_iface() - vm.basic_config( - vcpu_count=vcpus, mem_size_mib=guest_mem_mib, cpu_template=msr_cpu_template - ) + vm.basic_config(vcpu_count=vcpus, mem_size_mib=guest_mem_mib) + vm.set_cpu_template(cpu_template_any) vm.start() vm.ssh.scp_put(DATA_FILES / "msr_reader.sh", "/tmp/msr_reader.sh") _, stdout, stderr = vm.ssh.run("/tmp/msr_reader.sh", timeout=None) @@ -319,7 +312,7 @@ def test_cpu_rdmsr( host_kv = global_props.host_linux_version guest_kv = re.search(r"vmlinux-(\d+\.\d+)", guest_kernel.name).group(1) baseline_file_name = ( - f"msr_list_{msr_cpu_template}_{host_cpu}_{host_kv}host_{guest_kv}guest.csv" + f"msr_list_{cpu_template_name}_{host_cpu}_{host_kv}host_{guest_kv}guest.csv" ) # save it as an artifact, so we don't have to manually launch an instance to # get a baseline @@ -371,7 +364,7 @@ def dump_msr_state_to_file(dump_fname, ssh_conn, shared_names): ) @pytest.mark.timeout(900) @pytest.mark.nonci -def test_cpu_wrmsr_snapshot(microvm_factory, guest_kernel, rootfs, msr_cpu_template): +def test_cpu_wrmsr_snapshot(microvm_factory, guest_kernel, rootfs, cpu_template_any): """ This is the first part of the test verifying that MSRs retain their values after restoring from a snapshot. @@ -388,6 +381,10 @@ def test_cpu_wrmsr_snapshot(microvm_factory, guest_kernel, rootfs, msr_cpu_templ This part of the test is responsible for taking a snapshot and publishing its files along with the `before` MSR dump. """ + cpu_template_name = get_cpu_template_name(cpu_template_any) + if cpu_template_name not in MSR_SUPPORTED_TEMPLATES: + pytest.skip(f"This test does not support {cpu_template_name} template.") + shared_names = SNAPSHOT_RESTORE_SHARED_NAMES vcpus, guest_mem_mib = 1, 1024 @@ -397,10 +394,10 @@ def test_cpu_wrmsr_snapshot(microvm_factory, guest_kernel, rootfs, msr_cpu_templ vm.basic_config( vcpu_count=vcpus, mem_size_mib=guest_mem_mib, - cpu_template=msr_cpu_template, track_dirty_pages=True, boot_args="msr.allow_writes=on", ) + vm.set_cpu_template(cpu_template_any) vm.start() # Make MSR modifications @@ -421,7 +418,7 @@ def test_cpu_wrmsr_snapshot(microvm_factory, guest_kernel, rootfs, msr_cpu_templ snapshot_artifacts_dir = ( Path(shared_names["snapshot_artifacts_root_dir_wrmsr"]) / guest_kernel.name - / get_cpu_template_name(msr_cpu_template, with_type=True) + / get_cpu_template_name(cpu_template_any, with_type=True) ) clean_and_mkdir(snapshot_artifacts_dir) @@ -473,7 +470,7 @@ def check_msrs_are_equal(before_recs, after_recs): ) @pytest.mark.timeout(900) @pytest.mark.nonci -def test_cpu_wrmsr_restore(microvm_factory, msr_cpu_template, guest_kernel): +def test_cpu_wrmsr_restore(microvm_factory, cpu_template_any, guest_kernel): """ This is the second part of the test verifying that MSRs retain their values after restoring from a snapshot. @@ -487,13 +484,15 @@ def test_cpu_wrmsr_restore(microvm_factory, msr_cpu_template, guest_kernel): This part of the test is responsible for restoring from a snapshot and comparing two sets of MSR values. """ + cpu_template_name = get_cpu_template_name(cpu_template_any) + if cpu_template_name not in MSR_SUPPORTED_TEMPLATES: + pytest.skip(f"This test does not support {cpu_template_name} template.") shared_names = SNAPSHOT_RESTORE_SHARED_NAMES - cpu_template_dir = get_cpu_template_name(msr_cpu_template, with_type=True) snapshot_artifacts_dir = ( Path(shared_names["snapshot_artifacts_root_dir_wrmsr"]) / guest_kernel.name - / cpu_template_dir + / get_cpu_template_name(cpu_template_any, with_type=True) ) skip_test_based_on_artifacts(snapshot_artifacts_dir) @@ -528,7 +527,7 @@ def dump_cpuid_to_file(dump_fname, ssh_conn): ) @pytest.mark.timeout(900) @pytest.mark.nonci -def test_cpu_cpuid_snapshot(microvm_factory, guest_kernel, rootfs, msr_cpu_template): +def test_cpu_cpuid_snapshot(microvm_factory, guest_kernel, rootfs, cpu_template_any): """ This is the first part of the test verifying that CPUID remains the same after restoring from a snapshot. @@ -540,6 +539,10 @@ def test_cpu_cpuid_snapshot(microvm_factory, guest_kernel, rootfs, msr_cpu_templ This part of the test is responsible for taking a snapshot and publishing its files along with the `before` CPUID dump. """ + cpu_template_name = get_cpu_template_name(cpu_template_any) + if cpu_template_name not in MSR_SUPPORTED_TEMPLATES: + pytest.skip("This test does not support {cpu_template_name} template.") + shared_names = SNAPSHOT_RESTORE_SHARED_NAMES vm = microvm_factory.build( @@ -551,17 +554,16 @@ def test_cpu_cpuid_snapshot(microvm_factory, guest_kernel, rootfs, msr_cpu_templ vm.basic_config( vcpu_count=1, mem_size_mib=1024, - cpu_template=msr_cpu_template, track_dirty_pages=True, ) + vm.set_cpu_template(cpu_template_any) vm.start() # Dump CPUID to a file that will be published to S3 for the 2nd part of the test - cpu_template_dir = get_cpu_template_name(msr_cpu_template, with_type=True) snapshot_artifacts_dir = ( Path(shared_names["snapshot_artifacts_root_dir_cpuid"]) / guest_kernel.name - / cpu_template_dir + / get_cpu_template_name(cpu_template_any, with_type=True) ) clean_and_mkdir(snapshot_artifacts_dir) @@ -595,7 +597,7 @@ def check_cpuid_is_equal(before_cpuid_fname, after_cpuid_fname): ) @pytest.mark.timeout(900) @pytest.mark.nonci -def test_cpu_cpuid_restore(microvm_factory, guest_kernel, msr_cpu_template): +def test_cpu_cpuid_restore(microvm_factory, guest_kernel, cpu_template_any): """ This is the second part of the test verifying that CPUID remains the same after restoring from a snapshot. @@ -607,13 +609,15 @@ def test_cpu_cpuid_restore(microvm_factory, guest_kernel, msr_cpu_template): This part of the test is responsible for restoring from a snapshot and comparing two CPUIDs. """ + cpu_template_name = get_cpu_template_name(cpu_template_any) + if cpu_template_name not in MSR_SUPPORTED_TEMPLATES: + pytest.skip("This test does not support {cpu_template_name} template.") shared_names = SNAPSHOT_RESTORE_SHARED_NAMES - cpu_template_dir = get_cpu_template_name(msr_cpu_template, with_type=True) snapshot_artifacts_dir = ( Path(shared_names["snapshot_artifacts_root_dir_cpuid"]) / guest_kernel.name - / cpu_template_dir + / get_cpu_template_name(cpu_template_any, with_type=True) ) skip_test_based_on_artifacts(snapshot_artifacts_dir) @@ -633,10 +637,7 @@ def test_cpu_cpuid_restore(microvm_factory, guest_kernel, msr_cpu_template): ) -@pytest.mark.parametrize( - "cpu_template", sorted({"T2", "T2S", "C3"}.intersection(SUPPORTED_CPU_TEMPLATES)) -) -def test_cpu_template(uvm_plain_any, cpu_template, microvm_factory): +def test_cpu_template(uvm_plain_any, cpu_template_any, microvm_factory): """ Test masked and enabled cpu features against the expected template. @@ -644,14 +645,18 @@ def test_cpu_template(uvm_plain_any, cpu_template, microvm_factory): guest and that expected enabled features are present for each of the supported CPU templates. """ + cpu_template_name = get_cpu_template_name(cpu_template_any) + if cpu_template_name not in ["T2", "T2S", "C3"]: + pytest.skip("This test does not support {cpu_template_name} template.") + test_microvm = uvm_plain_any test_microvm.spawn() # Set template as specified in the `cpu_template` parameter. test_microvm.basic_config( vcpu_count=1, mem_size_mib=256, - cpu_template=cpu_template, ) + test_microvm.set_cpu_template(cpu_template_any) test_microvm.add_net_iface() if cpuid_utils.get_cpu_vendor() != cpuid_utils.CpuVendor.INTEL: @@ -662,8 +667,8 @@ def test_cpu_template(uvm_plain_any, cpu_template, microvm_factory): test_microvm.start() - check_masked_features(test_microvm, cpu_template) - check_enabled_features(test_microvm, cpu_template) + check_masked_features(test_microvm, cpu_template_name) + check_enabled_features(test_microvm, cpu_template_name) # Check that cpu features are still correct # after snap/restore cycle. @@ -671,8 +676,8 @@ def test_cpu_template(uvm_plain_any, cpu_template, microvm_factory): restored_vm = microvm_factory.build() restored_vm.spawn() restored_vm.restore_from_snapshot(snapshot, resume=True) - check_masked_features(restored_vm, cpu_template) - check_enabled_features(restored_vm, cpu_template) + check_masked_features(restored_vm, cpu_template_name) + check_enabled_features(restored_vm, cpu_template_name) def check_masked_features(test_microvm, cpu_template): From b0c191ec13ebb7ea868b8bae5be3bdceb744bc11 Mon Sep 17 00:00:00 2001 From: Takahiro Itazuri Date: Tue, 8 Apr 2025 15:34:29 +0000 Subject: [PATCH 4/8] fix(test): Fix DS bit position The Debug Store (DS) bit is enumerated on CPUID.01H:EDX[21]. CPUID.01H:EDX[20] is a reserved bit. Signed-off-by: Takahiro Itazuri --- .../integration_tests/functional/test_cpu_features_x86_64.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/integration_tests/functional/test_cpu_features_x86_64.py b/tests/integration_tests/functional/test_cpu_features_x86_64.py index 856f79f09c4..c3384693bd7 100644 --- a/tests/integration_tests/functional/test_cpu_features_x86_64.py +++ b/tests/integration_tests/functional/test_cpu_features_x86_64.py @@ -701,7 +701,7 @@ def check_masked_features(test_microvm, cpu_template): ), (0x1, 0x0, "edx", (1 << 18) | # PSN - (1 << 20) | # DS + (1 << 21) | # DS (1 << 22) | # ACPI (1 << 27) | # SS (1 << 29) | # TM @@ -787,7 +787,7 @@ def check_masked_features(test_microvm, cpu_template): ), (0x1, 0x0, "edx", (1 << 18) | # PSN - (1 << 20) | # DS + (1 << 21) | # DS (1 << 22) | # ACPI (1 << 27) | # SS (1 << 29) | # TM From b8148e777705fadf4082ae699d75f2a4725b7a3c Mon Sep 17 00:00:00 2001 From: Takahiro Itazuri Date: Tue, 8 Apr 2025 16:13:32 +0000 Subject: [PATCH 5/8] feat: CPU template mapping Sapphire Rapids to EC2 T2 Adds a CPU template mapping Intel Sapphire Rapids to EC2 T2 instance type. We need a different CPU template for older kernels (prior to v5.17), because KVM does not support Intel AMX. Signed-off-by: Takahiro Itazuri --- .buildkite/pipeline_cpu_template.py | 4 + .../custom_cpu_templates/SPR_TO_T2_5.10.json | 102 ++++ .../custom_cpu_templates/SPR_TO_T2_6.1.json | 217 ++++++++ ...TEL_SAPPHIRE_RAPIDS_5.10host_5.10guest.csv | 509 ++++++++++++++++++ ...NTEL_SAPPHIRE_RAPIDS_5.10host_6.1guest.csv | 509 ++++++++++++++++++ ...NTEL_SAPPHIRE_RAPIDS_6.1host_5.10guest.csv | 497 +++++++++++++++++ ...INTEL_SAPPHIRE_RAPIDS_6.1host_6.1guest.csv | 497 +++++++++++++++++ tests/framework/utils_cpu_templates.py | 6 + tests/framework/utils_cpuid.py | 3 + .../functional/test_cpu_features_x86_64.py | 141 ++++- 10 files changed, 2482 insertions(+), 3 deletions(-) create mode 100644 tests/data/custom_cpu_templates/SPR_TO_T2_5.10.json create mode 100644 tests/data/custom_cpu_templates/SPR_TO_T2_6.1.json create mode 100644 tests/data/msr/msr_list_SPR_TO_T2_5.10_INTEL_SAPPHIRE_RAPIDS_5.10host_5.10guest.csv create mode 100644 tests/data/msr/msr_list_SPR_TO_T2_5.10_INTEL_SAPPHIRE_RAPIDS_5.10host_6.1guest.csv create mode 100644 tests/data/msr/msr_list_SPR_TO_T2_6.1_INTEL_SAPPHIRE_RAPIDS_6.1host_5.10guest.csv create mode 100644 tests/data/msr/msr_list_SPR_TO_T2_6.1_INTEL_SAPPHIRE_RAPIDS_6.1host_6.1guest.csv diff --git a/.buildkite/pipeline_cpu_template.py b/.buildkite/pipeline_cpu_template.py index a9c8e2239c4..042693c185c 100755 --- a/.buildkite/pipeline_cpu_template.py +++ b/.buildkite/pipeline_cpu_template.py @@ -30,6 +30,8 @@ class BkStep(str, Enum): "c5n.metal", "m5n.metal", "m6i.metal", + "m7i.metal-24xl", + "m7i.metal-48xl", "m6a.metal", "m7a.metal-48xl", ], @@ -69,6 +71,8 @@ class BkStep(str, Enum): "c5n.metal", "m5n.metal", "m6i.metal", + "m7i.metal-24xl", + "m7i.metal-48xl", "m6a.metal", ], }, diff --git a/tests/data/custom_cpu_templates/SPR_TO_T2_5.10.json b/tests/data/custom_cpu_templates/SPR_TO_T2_5.10.json new file mode 100644 index 00000000000..7af388c0f37 --- /dev/null +++ b/tests/data/custom_cpu_templates/SPR_TO_T2_5.10.json @@ -0,0 +1,102 @@ +{ + "cpuid_modifiers": [ + { + "leaf": "0x1", + "subleaf": "0x0", + "flags": 0, + "modifiers": [ + { + "register": "eax", + "bitmap": "0bxxxx000000000011xx00011011110010" + }, + { + "register": "ecx", + "bitmap": "0bxxxxxxxxxxxxx0xx00xx00x0000000xx" + }, + { + "register": "edx", + "bitmap": "0b000x0xxxx00xx0xxxxx1xxxx1xxxxxxx" + } + ] + }, + { + "leaf": "0x7", + "subleaf": "0x0", + "flags": 1, + "modifiers": [ + { + "register": "ebx", + "bitmap": "0b00000000000x000000x00x1xxxx0x0xx" + }, + { + "register": "ecx", + "bitmap": "0bx0x00x00x0xxxxx0x0x00000x0x0000x" + }, + { + "register": "edx", + "bitmap": "0bxxxxxx0000xxxxx0x0xxxxx0xxx000xx" + } + ] + }, + { + "leaf": "0x7", + "subleaf": "0x1", + "flags": 1, + "modifiers": [ + { + "register": "eax", + "bitmap": "0bxxxxxxxxxxxxxxxxxxxxxxxxxx00xxxx" + } + ] + }, + { + "leaf": "0xd", + "subleaf": "0x0", + "flags": 1, + "modifiers": [ + { + "register": "eax", + "bitmap": "0bxxxxxxxxxxxxx00xxxxxxx0x00000xxx" + } + ] + }, + { + "leaf": "0xd", + "subleaf": "0x1", + "flags": 1, + "modifiers": [ + { + "register": "eax", + "bitmap": "0bxxxxxxxxxxxxxxxxxxxxxxxxxxx0000x" + } + ] + }, + { + "leaf": "0x80000001", + "subleaf": "0x0", + "flags": 0, + "modifiers": [ + { + "register": "ecx", + "bitmap": "0bxx0xxxxxxxxxxxxxxxxxxxx0xxxxxxxx" + }, + { + "register": "edx", + "bitmap": "0bxxxxx0xxxxxxxxxxxxxxxxxxxxxxxxxx" + } + ] + }, + { + "leaf": "0x80000008", + "subleaf": "0x0", + "flags": 0, + "modifiers": [ + { + "register": "ebx", + "bitmap": "0bxxxxxxxxxxxxxxxxxxxxxx0xxxxxxxxx" + } + ] + } + ], + "msr_modifiers": [] +} diff --git a/tests/data/custom_cpu_templates/SPR_TO_T2_6.1.json b/tests/data/custom_cpu_templates/SPR_TO_T2_6.1.json new file mode 100644 index 00000000000..0ef96be75ed --- /dev/null +++ b/tests/data/custom_cpu_templates/SPR_TO_T2_6.1.json @@ -0,0 +1,217 @@ +{ + "cpuid_modifiers": [ + { + "leaf": "0x1", + "subleaf": "0x0", + "flags": 0, + "modifiers": [ + { + "register": "eax", + "bitmap": "0bxxxx000000000011xx00011011110010" + }, + { + "register": "ecx", + "bitmap": "0bxxxxxxxxxxxxx0xx00xx00x0000000xx" + }, + { + "register": "edx", + "bitmap": "0b000x0xxxx00xx0xxxxx1xxxx1xxxxxxx" + } + ] + }, + { + "leaf": "0x7", + "subleaf": "0x0", + "flags": 1, + "modifiers": [ + { + "register": "ebx", + "bitmap": "0b00000000000x000000x00x1xxxx0x0xx" + }, + { + "register": "ecx", + "bitmap": "0bx0x00x00x0xxxxx0x0x00000x0x0000x" + }, + { + "register": "edx", + "bitmap": "0bxxxxxx0000xxxxx0x0xxxxx0xxx000xx" + } + ] + }, + { + "leaf": "0x7", + "subleaf": "0x1", + "flags": 1, + "modifiers": [ + { + "register": "eax", + "bitmap": "0bxxxxxxxxxxxxxxxxxxxxxxxxxx00xxxx" + } + ] + }, + { + "leaf": "0xd", + "subleaf": "0x0", + "flags": 1, + "modifiers": [ + { + "register": "eax", + "bitmap": "0bxxxxxxxxxxxxx00xxxxxxx0x00000xxx" + } + ] + }, + { + "leaf": "0xd", + "subleaf": "0x1", + "flags": 1, + "modifiers": [ + { + "register": "eax", + "bitmap": "0bxxxxxxxxxxxxxxxxxxxxxxxxxxx0000x" + } + ] + }, + { + "leaf": "0xd", + "subleaf": "0x11", + "flags": 1, + "modifiers": [ + { + "register": "eax", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "ebx", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "ecx", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "edx", + "bitmap": "0b00000000000000000000000000000000" + } + ] + }, + { + "leaf": "0xd", + "subleaf": "0x12", + "flags": 1, + "modifiers": [ + { + "register": "eax", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "ebx", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "ecx", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "edx", + "bitmap": "0b00000000000000000000000000000000" + } + ] + }, + { + "leaf": "0x1d", + "subleaf": "0x0", + "flags": 1, + "modifiers": [ + { + "register": "eax", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "ebx", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "ecx", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "edx", + "bitmap": "0b00000000000000000000000000000000" + } + ] + }, + { + "leaf": "0x1d", + "subleaf": "0x1", + "flags": 1, + "modifiers": [ + { + "register": "eax", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "ebx", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "ecx", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "edx", + "bitmap": "0b00000000000000000000000000000000" + } + ] + }, + { + "leaf": "0x1e", + "subleaf": "0x0", + "flags": 0, + "modifiers": [ + { + "register": "eax", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "ebx", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "ecx", + "bitmap": "0b00000000000000000000000000000000" + }, + { + "register": "edx", + "bitmap": "0b00000000000000000000000000000000" + } + ] + }, + { + "leaf": "0x80000001", + "subleaf": "0x0", + "flags": 0, + "modifiers": [ + { + "register": "ecx", + "bitmap": "0bxx0xxxxxxxxxxxxxxxxxxxx0xxxxxxxx" + }, + { + "register": "edx", + "bitmap": "0bxxxxx0xxxxxxxxxxxxxxxxxxxxxxxxxx" + } + ] + }, + { + "leaf": "0x80000008", + "subleaf": "0x0", + "flags": 0, + "modifiers": [ + { + "register": "ebx", + "bitmap": "0bxxxxxxxxxxxxxxxxxxxxxx0xxxxxxxxx" + } + ] + } + ], + "msr_modifiers": [] +} diff --git a/tests/data/msr/msr_list_SPR_TO_T2_5.10_INTEL_SAPPHIRE_RAPIDS_5.10host_5.10guest.csv b/tests/data/msr/msr_list_SPR_TO_T2_5.10_INTEL_SAPPHIRE_RAPIDS_5.10host_5.10guest.csv new file mode 100644 index 00000000000..ff89d9f170a --- /dev/null +++ b/tests/data/msr/msr_list_SPR_TO_T2_5.10_INTEL_SAPPHIRE_RAPIDS_5.10host_5.10guest.csv @@ -0,0 +1,509 @@ +MSR_ADDR,VALUE +0,0x0 +0x1,0x0 +0x10,0x89887080 +0x11,0x24a1008 +0x12,0x24a2001 +0x17,0x0 +0x1b,0xfee00d00 +0x2a,0x0 +0x2c,0x1000000 +0x34,0x0 +0x3a,0x1 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+0x40000000000000,0x0 diff --git a/tests/framework/utils_cpu_templates.py b/tests/framework/utils_cpu_templates.py index 830ad72b1f0..372d9a11bad 100644 --- a/tests/framework/utils_cpu_templates.py +++ b/tests/framework/utils_cpu_templates.py @@ -52,6 +52,12 @@ def get_supported_custom_cpu_templates(): return INTEL_TEMPLATES case CpuVendor.INTEL, CpuModel.INTEL_ICELAKE: return set(INTEL_TEMPLATES) - {"T2S"} + case CpuVendor.INTEL, CpuModel.INTEL_SAPPHIRE_RAPIDS: + # Intel AMX is only supported on kernel 5.17+. KVM does not support + # related CPUID range. + if host_linux >= (5, 17): + return ["SPR_TO_T2_6.1"] + return ["SPR_TO_T2_5.10"] case CpuVendor.AMD, CpuModel.AMD_MILAN: return AMD_TEMPLATES case CpuVendor.ARM, CpuModel.ARM_NEOVERSE_N1 if host_linux >= (6, 1): diff --git a/tests/framework/utils_cpuid.py b/tests/framework/utils_cpuid.py index a3988bf7f85..8e93f60a9a8 100644 --- a/tests/framework/utils_cpuid.py +++ b/tests/framework/utils_cpuid.py @@ -194,6 +194,9 @@ def check_cpuid_feat_flags(vm, must_be_set, must_be_unset): for leaf, subleaf, reg, flags in must_be_unset: assert reg in allowed_regs + if (leaf, subleaf, reg) not in cpuid: + # The absence of the leaf/subleaf is equivalent to "unset". + continue actual = cpuid[(leaf, subleaf, reg)] & flags expected = 0 assert ( diff --git a/tests/integration_tests/functional/test_cpu_features_x86_64.py b/tests/integration_tests/functional/test_cpu_features_x86_64.py index c3384693bd7..3e24e483679 100644 --- a/tests/integration_tests/functional/test_cpu_features_x86_64.py +++ b/tests/integration_tests/functional/test_cpu_features_x86_64.py @@ -250,7 +250,7 @@ def test_brand_string(uvm_plain_any): # fmt: on -MSR_SUPPORTED_TEMPLATES = ["T2A", "T2CL", "T2S"] +MSR_SUPPORTED_TEMPLATES = ["T2A", "T2CL", "T2S", "SPR_TO_T2_5.10", "SPR_TO_T2_6.1"] @pytest.mark.timeout(900) @@ -646,7 +646,7 @@ def test_cpu_template(uvm_plain_any, cpu_template_any, microvm_factory): supported CPU templates. """ cpu_template_name = get_cpu_template_name(cpu_template_any) - if cpu_template_name not in ["T2", "T2S", "C3"]: + if cpu_template_name not in ["T2", "T2S", "SPR_TO_T2_5.10", "SPR_TO_T2_6.1" "C3"]: pytest.skip("This test does not support {cpu_template_name} template.") test_microvm = uvm_plain_any @@ -863,6 +863,141 @@ def check_masked_features(test_microvm, cpu_template): (1 << 9) # WBNOINVD ) ] + elif cpu_template in ["SPR_TO_T2_5.10", "SPR_TO_T2_6.1"]: + must_be_unset = [ + (0x1, 0x0, "ecx", + (1 << 2) | # DTES64 + (1 << 3) | # MONITOR + (1 << 4) | # DS-CPL + (1 << 5) | # VMX + (1 << 6) | # SMX + (1 << 7) | # EIST + (1 << 8) | # TM2 + (1 << 10) | # CNXT-ID + (1 << 11) | # SDBG + (1 << 14) | # XTPR_UPDATE + (1 << 15) | # PDCM + (1 << 18) # DCA + ), + (0x1, 0x0, "edx", + (1 << 18) | # PSN + (1 << 21) | # DS + (1 << 22) | # ACPI + (1 << 27) | # SS + (1 << 29) | # TM + (1 << 30) | # IA64 + (1 << 31) # PBE + ), + (0x7, 0x0, "ebx", + (1 << 2) | # SGX + (1 << 4) | # HLE + (1 << 11) | # RTM + (1 << 12) | # RDT-M + (1 << 14) | # MPX + (1 << 15) | # RDT-A + (1 << 16) | # AVX512F + (1 << 17) | # AVX512DQ + (1 << 18) | # RDSEED + (1 << 19) | # ADX + (1 << 21) | # AVX512IFMA + (1 << 22) | # PCOMMIT + (1 << 23) | # CLFLUSHOPT + (1 << 24) | # CLWB + (1 << 25) | # PT + (1 << 26) | # AVX512PF + (1 << 27) | # AVX512ER + (1 << 28) | # AVX512CD + (1 << 29) | # SHA + (1 << 30) | # AVX512BW + (1 << 31) # AVX512VL + ), + (0x7, 0x0, "ecx", + (1 << 1) | # AVX512_VBMI + (1 << 2) | # UMIP + (1 << 3) | # PKU + (1 << 4) | # OSPKE + (1 << 6) | # AVX512_VBMI2 + (1 << 8) | # GFNI + (1 << 9) | # VAES + (1 << 10) | # VPCLMULQDQ + (1 << 11) | # AVX512_VNNI + (1 << 12) | # AVX512_BITALG + (1 << 14) | # AVX512_VPOPCNTDQ + (1 << 16) | # LA57 + (1 << 22) | # RDPID + (1 << 24) | # BUS_LOCK_DETECT + (1 << 25) | # CLDEMOTE + (1 << 27) | # MOVDIRI + (1 << 28) | # MOVDIR64B + (1 << 30) # SGX_LC + ), + (0x7, 0x0, "edx", + (1 << 2) | # AVX512_4VNNIW + (1 << 3) | # AVX512_4FMAPS + (1 << 4) | # FSRM + (1 << 8) | # AVX512_VP2INTERSECT + (1 << 14) | # SERIALIZE + (1 << 16) | # TSXLDTRK + (1 << 22) | # AMX-BF16 + (1 << 23) | # AVX512_FP16 + (1 << 24) | # AMX-TILE + (1 << 25) # AMX-INT8 + ), + (0x7, 0x1, "eax", + (1 << 4) | # AVX-VNI + (1 << 5) # AVX512_BF16 + ), + # Note that we don't intentionally mask hardware security features. + # - IPRED_CTRL: CPUID.(EAX=07H,ECX=2):EDX[1] + # - RRSBA_CTRL: CPUID.(EAX=07H,ECX=2):EDX[2] + # - BHI_CTRL: CPUID.(EAX=07H,ECX=2):EDX[4] + (0xd, 0x0, "eax", + (1 << 3) | # MPX state bit 0 + (1 << 4) | # MPX state bit 1 + (1 << 5) | # AVX-512 state bit 0 + (1 << 6) | # AVX-512 state bit 1 + (1 << 7) | # AVX-512 state bit 2 + (1 << 9) | # PKRU state + (1 << 17) | # AMX TILECFG state + (1 << 18) # AMX TILEDATA state + ), + (0xd, 0x1, "eax", + (1 << 1) | # XSAVEC + (1 << 2) | # XGETBV with ECX=1 + (1 << 3) | # XSAVES/XRSTORS and IA32_XSS + (1 << 4) # XFD + ), + (0xd, 0x11, "eax", (1 << 32) - 1), # AMX TILECFG XSTATE leaf, EAX + (0xd, 0x11, "ebx", (1 << 32) - 1), # AMX TILECFG XSTATE leaf, EBX + (0xd, 0x11, "ecx", (1 << 32) - 1), # AMX TILECFG XSTATE leaf, ECX + (0xd, 0x11, "edx", (1 << 32) - 1), # AMX TILECFG XSTATE leaf, EDX + (0xd, 0x12, "eax", (1 << 32) - 1), # AMX TILEDATA XSTATE leaf, EAX + (0xd, 0x12, "ebx", (1 << 32) - 1), # AMX TILEDATA XSTATE leaf, EBX + (0xd, 0x12, "ecx", (1 << 32) - 1), # AMX TILEDATA XSTATE leaf, ECX + (0xd, 0x12, "edx", (1 << 32) - 1), # AMX TILEDATA XSTATE leaf, EDX + (0x1d, 0x0, "eax", (1 << 32) - 1), # AMX Tile Information leaf, EAX + (0x1d, 0x0, "ebx", (1 << 32) - 1), # AMX Tile Information leaf, EBX + (0x1d, 0x0, "ecx", (1 << 32) - 1), # AMX Tile Information leaf, ECX + (0x1d, 0x0, "edx", (1 << 32) - 1), # AMX Tile Information leaf, EDX + (0x1d, 0x1, "eax", (1 << 32) - 1), # AMX Tile Palette 1 leaf, EAX + (0x1d, 0x1, "ebx", (1 << 32) - 1), # AMX Tile Palette 1 leaf, EBX + (0x1d, 0x1, "ecx", (1 << 32) - 1), # AMX Tile Palette 1 leaf, ECX + (0x1d, 0x1, "edx", (1 << 32) - 1), # AMX TIle Palette 1 leaf, EDX + (0x1e, 0x0, "eax", (1 << 32) - 1), # AMX TMUL Information leaf, EAX + (0x1e, 0x0, "ebx", (1 << 32) - 1), # AMX TMUL Information leaf, EBX + (0x1e, 0x0, "ecx", (1 << 32) - 1), # AMX TMUL Information leaf, ECX + (0x1e, 0x0, "edx", (1 << 32) - 1), # AMX TMUL Information leaf, EDX + (0x80000001, 0x0, "ecx", + (1 << 8) | # PREFETCHW + (1 << 29) # MWAITX / MONITORX + ), + (0x80000001, 0x0, "edx", + (1 << 26) # 1-GByte pages + ), + (0x80000008, 0x0, "ebx", + (1 << 9) # WBNOINVD + ) + ] # fmt: on cpuid_utils.check_cpuid_feat_flags( @@ -943,7 +1078,7 @@ def check_enabled_features(test_microvm, cpu_template): cpuid_utils.check_guest_cpuid_output( test_microvm, "cpuid -1", None, "=", enabled_list ) - if cpu_template == "T2": + if cpu_template in ["T2", "SPR_TO_T2_5.10", "SPR_TO_T2_6.1"]: t2_enabled_features = { "FMA instruction": "true", "BMI1 instructions": "true", From 5b5463066ea6090a2ddd4eb9d24b5757449355fe Mon Sep 17 00:00:00 2001 From: Takahiro Itazuri Date: Tue, 8 Apr 2025 18:36:54 +0000 Subject: [PATCH 6/8] refactor(test): Use utility function to set CPU template There is a utility function that accepts both static and custom CPU templates. Signed-off-by: Takahiro Itazuri --- tests/integration_tests/functional/test_snapshot_phase1.py | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/tests/integration_tests/functional/test_snapshot_phase1.py b/tests/integration_tests/functional/test_snapshot_phase1.py index 2e7d72ddf18..9bdfc9d0ce4 100644 --- a/tests/integration_tests/functional/test_snapshot_phase1.py +++ b/tests/integration_tests/functional/test_snapshot_phase1.py @@ -36,16 +36,11 @@ def test_snapshot_phase1( vm.spawn(log_level="Info") vm.add_net_iface() - static_cpu_template = None - if isinstance(cpu_template_any, str): - static_cpu_template = cpu_template_any - elif isinstance(cpu_template_any, dict): - vm.api.cpu_config.put(**cpu_template_any["template"]) vm.basic_config( vcpu_count=2, mem_size_mib=512, - cpu_template=static_cpu_template, ) + vm.set_cpu_template(cpu_template_any) guest_kernel_version = re.search("vmlinux-(.*)", vm.kernel_file.name) cpu_template_name = get_cpu_template_name(cpu_template_any, with_type=True) From 1750a7f0dd93816e6fcb11e7ac5a454def163785 Mon Sep 17 00:00:00 2001 From: Takahiro Itazuri Date: Tue, 8 Apr 2025 18:36:19 +0000 Subject: [PATCH 7/8] test: Enable Intel Sapphire Rapids in all pipelines Now it's ready to use Intel Sapphire Rapids fully on our pipelines :) Adds it to the test platforms doc. Official support declaration will be done in CHANGELOG later. Signed-off-by: Takahiro Itazuri --- .buildkite/common.py | 18 +++++++++++------- .buildkite/pipeline_cross.py | 2 ++ README.md | 2 ++ 3 files changed, 15 insertions(+), 7 deletions(-) diff --git a/.buildkite/common.py b/.buildkite/common.py index 24607609841..81867a252bf 100644 --- a/.buildkite/common.py +++ b/.buildkite/common.py @@ -14,15 +14,19 @@ import subprocess from pathlib import Path +# fmt: off DEFAULT_INSTANCES = [ - "c5n.metal", # Intel Skylake - "m5n.metal", # Intel Cascade Lake - "m6i.metal", # Intel Icelake - "m6a.metal", # AMD Milan - "m7a.metal-48xl", # AMD Genoa - "m6g.metal", # Graviton2 - "m7g.metal", # Graviton3 + "c5n.metal", # Intel Skylake + "m5n.metal", # Intel Cascade Lake + "m6i.metal", # Intel Icelake + "m7i.metal-24xl", # Intel Sapphire Rapids + "m7i.metal-48xl", # Intel Sapphire Rapids + "m6a.metal", # AMD Milan + "m7a.metal-48xl", # AMD Genoa + "m6g.metal", # Graviton2 + "m7g.metal", # Graviton3 ] +# fmt: on DEFAULT_PLATFORMS = [ ("al2", "linux_5.10"), diff --git a/.buildkite/pipeline_cross.py b/.buildkite/pipeline_cross.py index c611f87c065..2b8c36ec428 100755 --- a/.buildkite/pipeline_cross.py +++ b/.buildkite/pipeline_cross.py @@ -22,6 +22,8 @@ "c5n.metal", "m5n.metal", "m6i.metal", + "m7i.metal-24xl", + "m7i.metal-48xl", "m6a.metal", "m7a.metal-48xl", ] diff --git a/README.md b/README.md index dcb5771f994..3f14657db5d 100644 --- a/README.md +++ b/README.md @@ -135,6 +135,8 @@ We test all combinations of: | c5n.metal | al2 linux_5.10 | ubuntu 24.04 | linux_5.10 | | m5n.metal | al2023 linux_6.1 | | linux_6.1 | | m6i.metal | | | | +| m7i.metal-24xl | | | | +| m7i.metal-48xl | | | | | m6a.metal | | | | | m7a.metal-48xl | | | | | m6g.metal | | | | From b56236847b9d490a00a34937b92f41e7bfa2409a Mon Sep 17 00:00:00 2001 From: Takahiro Itazuri Date: Wed, 9 Apr 2025 07:33:41 +0000 Subject: [PATCH 8/8] test: Verify attempt to use WAITPKG generates #UD We disable WAITPKG in CPUID normalization and it is expected that attempting to use it generates #UD in guest. Adds an integration test for it. Signed-off-by: Takahiro Itazuri --- tests/conftest.py | 12 ++++++++++ tests/host_tools/waitpkg.c | 24 +++++++++++++++++++ .../functional/test_cpu_features_x86_64.py | 18 ++++++++++++++ 3 files changed, 54 insertions(+) create mode 100644 tests/host_tools/waitpkg.c diff --git a/tests/conftest.py b/tests/conftest.py index 943cb561df5..99d2e5c4344 100644 --- a/tests/conftest.py +++ b/tests/conftest.py @@ -237,6 +237,18 @@ def change_net_config_space_bin(test_fc_session_root_path): yield change_net_config_space_bin +@pytest.fixture(scope="session") +def waitpkg_bin(test_fc_session_root_path): + """Build a binary that attempts to use WAITPKG (UMONITOR / UMWAIT)""" + waitpkg_bin_path = os.path.join(test_fc_session_root_path, "waitpkg") + build_tools.gcc_compile( + "host_tools/waitpkg.c", + waitpkg_bin_path, + extra_flags="-mwaitpkg", + ) + yield waitpkg_bin_path + + @pytest.fixture def bin_seccomp_paths(): """Build jailers and jailed binaries to test seccomp. diff --git a/tests/host_tools/waitpkg.c b/tests/host_tools/waitpkg.c new file mode 100644 index 00000000000..2644891e769 --- /dev/null +++ b/tests/host_tools/waitpkg.c @@ -0,0 +1,24 @@ +// Copyright 2025 Amazon.com, Inc. or its affiliates. All Rights Reserved. +// SPDX-License-Identifier: Apache-2.0 + +// This is a sample code to attempt to use WAITPKG (UMONITOR / UWAIT / TPAUSE +// instructions). It is used to test that attemping to use it generates #UD. + +#include +#include +#include + +void umwait(volatile int *addr) { + _umonitor((void *)addr); + printf("address monitoring hardware armed\n"); + uint64_t timeout = 1000000000ULL; + uint32_t control = 0; + uint8_t cflag = _umwait(control, timeout); + printf("cflag = %d\n", cflag); +} + +int main() { + int a = 0; + umwait(&a); + return 0; +} diff --git a/tests/integration_tests/functional/test_cpu_features_x86_64.py b/tests/integration_tests/functional/test_cpu_features_x86_64.py index 3e24e483679..9c2735bf481 100644 --- a/tests/integration_tests/functional/test_cpu_features_x86_64.py +++ b/tests/integration_tests/functional/test_cpu_features_x86_64.py @@ -1149,3 +1149,21 @@ def test_intel_amx_reported_on_sapphire_rapids( "=", expected_dict, ) + + +def test_waitpkg_inaccessibility(uvm_nano, waitpkg_bin): + """ + Verifies that attempting to use WAITPKG (UMONITOR / UMWAIT instructions) + generates #UD. + """ + vm = uvm_nano + vm.add_net_iface() + vm.start() + + rmt_path = "/tmp/waitpkg" + vm.ssh.scp_put(waitpkg_bin, rmt_path) + + cmd = f"{rmt_path}; echo $?" + _, stdout, stderr = vm.ssh.check_output(cmd) + assert stdout == "132\n" + assert "Illegal instruction" in stderr