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lines changed Original file line number Diff line number Diff line change @@ -37,3 +37,6 @@ include config/extra/with-rocksdb.mk
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endif
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FD_ARCH_SUPPORTS_SANDBOX: =1
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+
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+ CPPFLAGS+=-DFD_HAS_ARM =1
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+ FD_HAS_ARM: =1
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#include "../../../disco/topo/fd_topo.h"
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#include "../../../discof/ipecho/fd_ipecho_client.h"
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+ #include <stdlib.h>
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#include <unistd.h>
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void
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#define FD_HAS_AESNI 0
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#endif
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+ /* FD_HAS_ARM: If the build target supports armv8-a specific features
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+ and can benefit from aarch64 specific optimizations, define
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+ FD_HAS_ARM. */
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+
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+ #ifndef FD_HAS_ARM
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+ #define FD_HAS_ARM 0
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+ #endif
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+
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/* FD_HAS_LZ4 indicates that the target supports LZ4 compression.
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Roughly, does "#include <lz4.h>" and the APIs therein work? */
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@@ -1245,6 +1253,8 @@ fd_hash_memcpy( ulong seed,
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#ifndef FD_TICKCOUNT_STYLE
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#if FD_HAS_X86 /* Use RDTSC */
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#define FD_TICKCOUNT_STYLE 1
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+ #elif FD_HAS_ARM /* Use CNTVCT_EL0 */
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+ #define FD_TICKCOUNT_STYLE 2
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#else /* Use portable fallback */
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#define FD_TICKCOUNT_STYLE 0
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#endif
@@ -1290,6 +1300,23 @@ fd_hash_memcpy( ulong seed,
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#define fd_tickcount () ((long)__builtin_ia32_rdtsc())
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+ #elif FD_TICKCOUNT_STYLE == 2 /* armv8 (fast) */
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+
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+ /* fd_tickcount (ARM): https://developer.arm.com/documentation/ddi0601/2021-12/AArch64-Registers/CNTVCT-EL0--Counter-timer-Virtual-Count-register
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+ Approx 24 MHz on Apple M1. */
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+
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+ static inline long
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+ fd_tickcount ( void ) {
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+ /* consider using 'isb' */
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+ ulong value ;
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+ __asm__ __volatile__ (
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+ "isb\n"
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+ "mrs %0, cntvct_el0\n"
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+ "nop"
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+ : "=r" (value ) );
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+ return (long )value ;
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+ }
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+
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#else
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#error "Unknown FD_TICKCOUNT_STYLE"
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#endif
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