@@ -137,17 +137,6 @@ mr_init()
137137
138138}
139139
140- static int
141- mr_isxmm (int rtype)
142- {
143- #if DEBUG
144- assert ((rtype == RATA_SP || rtype == RATA_DP || rtype == RATA_CSP ||
145- rtype == RATA_CDP),
146- " mr_isxmm bad rtype" , rtype, ERR_Severe);
147- #endif
148- return (reg[rtype].mach_reg ->Class == ' x' );
149- }
150-
151140void
152141mr_reset_numglobals (int reduce_by)
153142{
@@ -218,19 +207,6 @@ _mr_getreg(int rtype)
218207 return (mr->next_global ++);
219208}
220209
221- /* * \brief map a register type and global register number to an index value in
222- * the range 0 .. MR_NUMGLB-1, taking into consideration that certain
223- * register types map to the same machine register set.
224- *
225- * This is used by * the optimizer to index into its register history table.
226- */
227- int
228- mr_gindex (int rtype, int regno)
229- {
230- MACH_REG *mr = reg[rtype].mach_reg ;
231- return ((regno - mr->first_global ) + mr->mapbase );
232- }
233-
234210/* * \brief communicate to the scheduler the first global register not assigned
235211 * for each register class
236212 *
@@ -251,13 +227,6 @@ mr_end()
251227
252228}
253229
254- void
255- static mr_reset_fpregs ()
256- {
257- mach_reg[1 ].next_global = mach_reg[1 ].first_global ;
258- mach_reg[2 ].next_global = mach_reg[2 ].first_global ;
259- }
260-
261230/* * \brief Initialize for scanning the entire machine register set used for
262231 * rtype.
263232 *
@@ -334,33 +303,6 @@ int _mr_getnext(int rtype)
334303 return mreg;
335304}
336305
337- /* RGSET functions */
338- static void
339- mr_init_rgset ()
340- {
341- RGSET tmp;
342- int bihx;
343-
344- /* just verify that regs all fit in RGSET fields. (+1 below is because
345- * current RGSET macro's assume regs start at 1, position 0 in bitfields
346- * is wasted. TST_ and SET_ macros could be changed along with these
347- * asserts to save the bit.
348- */
349- assert (sizeof (tmp.xr ) * 8 >= mach_reg[2 ].max + 1 , " RGSET xr ops invalid" , 0 ,
350- ERR_Severe);
351-
352- rgsetb.stg_avail = 1 ;
353-
354- /* make sure BIH_RGSET fields are fresh. */
355- bihx = gbl.entbih ;
356- for (;;) {
357- BIH_RGSET (bihx) = 0 ;
358- if (BIH_LAST (bihx))
359- break ;
360- bihx = BIH_NEXT (bihx);
361- }
362- }
363-
364306/* * \brief allocate and initialize a RGSET entry. */
365307int
366308mr_get_rgset ()
@@ -379,53 +321,3 @@ mr_get_rgset()
379321
380322 return rgset;
381323}
382-
383- static void
384- mr_dmp_rgset (int rgseti)
385- {
386- int i;
387- int cnt = 0 ;
388-
389- fprintf (gbl.dbgfil , " rgset %d:" , rgseti);
390- if (rgseti == 0 ) {
391- fprintf (gbl.dbgfil , " null" );
392- assert (RGSET_XR (0 ) == 0 , " mr_dmp_rgset says someone was writing 0" , 0 , ERR_Severe);
393- }
394- for (i = XR_FIRST; i <= XR_LAST; i++) {
395- if (TST_RGSET_XR (rgseti, i)) {
396- fprintf (gbl.dbgfil , " xmm%d" , i);
397- cnt++;
398- }
399- }
400- fprintf (gbl.dbgfil , " total %d\n " , cnt);
401- }
402-
403- /* called from flow.c to tell globalreg, and scheduler which
404- xmm regs are used by the vectorizer.
405- */
406- static void
407- mr_bset_xmm_rgset (int ili, int bih)
408- {
409- int j, opn;
410- ILI_OP opc;
411- int noprs;
412-
413- if (BIH_RGSET (bih) == 0 ) {
414- BIH_RGSET (bih) = mr_get_rgset ();
415- }
416-
417- opc = ILI_OPC (ili);
418- noprs = ilis[opc].oprs ;
419- for (j = 1 ; j <= noprs; j++) {
420- opn = ILI_OPND (ili, j);
421- switch (IL_OPRFLAG (opc, j)) {
422- case ILIO_XMM:
423- assert (opn >= XR_FIRST && opn <= XR_LAST,
424- " mr_bset_xmm_rgset: bad xmm register value" , ili, ERR_Warning);
425- SET_RGSET_XR (BIH_RGSET (bih), opn);
426- break ;
427- default :
428- break ;
429- }
430- }
431- }
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