diff --git a/tools/flang2/docs/register.n b/tools/flang2/docs/register.n index 9f87cdc1d6a..1ec15dc0092 100644 --- a/tools/flang2/docs/register.n +++ b/tools/flang2/docs/register.n @@ -366,21 +366,4 @@ If one is not available, .cw MR_NOREG is returned. .lp -.CS -int mr_gindex(rtype, reg) -int rtype, reg; -.CE -.ip -This function maps a register type, -.cw rtype , -and a global machine register number, -.cw reg , -to an index value in the range -.cw 0..MR_NUMGLB-1 . -This routine is aware that certain register types may map to the -same machine register set. -This routine provides a mechanism for ensuring that the history -of a machine register can be kept regardless of the many to one register -type mapping. -.lp .nr 5n diff --git a/tools/flang2/flang2exe/aarch64-Linux/machreg.h b/tools/flang2/flang2exe/aarch64-Linux/machreg.h index a43a75804ad..39115c798f5 100644 --- a/tools/flang2/flang2exe/aarch64-Linux/machreg.h +++ b/tools/flang2/flang2exe/aarch64-Linux/machreg.h @@ -193,7 +193,6 @@ extern char *zm_reg[MAX_N_XMM_REGS + 1]; /* ZMM_REG_NAMES */ /* Use macros ARG_IR, ARG_XR, etc. */ -extern int mr_arg_ir[MR_MAX_IREG_ARGS + 1]; /* defd in machreg.c */ extern int mr_arg_xr[MR_MAX_XREG_ARGS + 1]; /* defd in machreg.c */ extern int mr_res_ir[MR_MAX_IREG_RES + 1]; extern int mr_res_xr[MR_MAX_XREG_RES + 1]; @@ -216,14 +215,13 @@ extern int mr_res_xr[MR_MAX_XREG_RES + 1]; /* Macros for unpacking/packing KR registers. */ -#define KR_LSH(i) (((i) >> 8) & 0xff) -#define KR_MSH(i) ((i)&0xff) -#define KR_PACK(ms, ls) (((ls) << 8) | (ms)) +#define KR_LSH(i) (i) +#define KR_MSH(i) (i) /* Macro for defining the KR register in which the value of a 64-bit integer * function is returned. */ -#define KR_RETVAL KR_PACK(IR_EDX, IR_EAX) +#define KR_RETVAL IR_RETVAL /* Define MR_UNIQ, the number of unique register classes for the machine. */ @@ -260,13 +258,6 @@ extern int mr_res_xr[MR_MAX_XREG_RES + 1]; */ #define MR_IR_AVAIL(c) 0 -/* Define gindex bounds for the set of global irs/ars and scratch - * irs/ars. MUST BE CONSISTENT with mr_gindex(). - */ -#define MR_GI_IR_LOW 0 -#define MR_GI_IR_HIGH (MR_U1 - MR_L1) -#define MR_GI_IS_SCR_IR(i) ((i) > (MR_U1 - MR_L1)) - /* Machine Register Information - * * This information is in two pieces: @@ -331,17 +322,8 @@ typedef struct {/* three -word bit-vector */ int xr; } RGSET; -#define RGSETG(i) rgsetb.stg_base[i] - #define RGSET_XR(i) rgsetb.stg_base[i].xr -#define SET_RGSET_XR(i, reg) \ - { \ - RGSET_XR(i) |= (1 << (reg)); \ - } - -#define TST_RGSET_XR(i, reg) ((RGSET_XR(i) >> (reg)) & 1) - typedef struct { RGSET *stg_base; int stg_avail; @@ -353,12 +335,47 @@ typedef struct { extern REG reg[]; extern RGSETB rgsetb; +#define SCRATCH_REGS {IR_RAX, IR_RCX, IR_RDX} + +#define MACH_REGS \ + { \ + {1, 8, 8 /*TBD*/, MR_L1, MR_U1, MR_U1, MR_U1, 0, 0, 'i'}, /* %r's */ \ + {1, 8, 8 /*TBD*/, MR_L2, MR_U2, MR_U2, MR_U2, 0, MR_MAX1, 'f'}, /* %f's */ \ + {1, 8, 8 /*TBD*/, MR_L3, MR_U3, MR_U3, MR_U3, 0, (MR_MAX1 + MR_MAX2), \ + 'x'} /* %f's xmm */ \ + } + +#define REGS(mach_regs) \ + { \ + {6, 0, 0, 0, &((mach_regs)[0]), RCF_NONE}, /* IR */ \ + {3, 0, 0, 0, &((mach_regs)[1]), RCF_NONE}, /* SP */ \ + {3, 0, 0, 0, &((mach_regs)[1]), RCF_NONE}, /* DP */ \ + {6, 0, 0, 0, &((mach_regs)[0]), RCF_NONE}, /* AR */ \ + {3, 0, 0, 0, &((mach_regs)[0]), RCF_NONE}, /* KR */ \ + {0, 0, 0, 0, 0, 0}, /* VECT */ \ + {0, 0, 0, 0, 0, 0}, /* QP */ \ + {3, 0, 0, 0, 0, RCF_NONE}, /* CSP */ \ + {3, 0, 0, 0, 0, RCF_NONE}, /* CDP */ \ + {0, 0, 0, 0, 0, 0}, /* CQP */ \ + {0, 0, 0, 0, 0, 0}, /* X87 */ \ + {0, 0, 0, 0, 0, 0}, /* CX87 */ \ + /* the following will be mapped over SP and DP above */ \ + {3, 0, 0, 0, &((mach_regs)[2]), RCF_NONE}, /* SPXM */ \ + {3, 0, 0, 0, &((mach_regs)[2]), RCF_NONE}, /* DPXM */ \ + } + +#define MR_RESET_FRGLOBALS(mach_regs) \ + { \ + /* effectively turn off fp global regs. */ \ + (mach_regs)[1].last_global = mach_reg[1].first_global - 1; \ + (mach_regs)[2].last_global = mach_reg[2].first_global - 1; \ + } + /***** External Function Declarations *****/ int mr_getnext(int rtype); int mr_getreg(int rtype); int mr_get_rgset(); - int mr_gindex(int rtype, int regno); void mr_end(); void mr_init(); void mr_reset_frglobals(); diff --git a/tools/flang2/flang2exe/machreg.cpp b/tools/flang2/flang2exe/machreg.cpp index 39fc0bd1090..5e1e64d1e8f 100644 --- a/tools/flang2/flang2exe/machreg.cpp +++ b/tools/flang2/flang2exe/machreg.cpp @@ -37,39 +37,28 @@ static bool mr_restore; /* need to backout for KR registers? */ static char mr_restore_next_global; /* saving the mr.next_global field */ static char mr_restore_nused; /* saving the mr.nused field */ -static MACH_REG mach_reg[MR_UNIQ] = { - {1, 8, 8 /*TBD*/, MR_L1, MR_U1, MR_U1, MR_U1, 0, 0, 'i'}, /* %r's */ - {1, 8, 8 /*TBD*/, MR_L2, MR_U2, MR_U2, MR_U2, 0, MR_MAX1, 'f'}, /* %f's */ - {1, 8, 8 /*TBD*/, MR_L3, MR_U3, MR_U3, MR_U3, 0, (MR_MAX1 + MR_MAX2), - 'x'} /* %f's xmm */ -}; - -REG reg[RATA_RTYPES_TOTAL] = { - {6, 0, 0, 0, &mach_reg[0], RCF_NONE}, /* IR */ - {3, 0, 0, 0, &mach_reg[1], RCF_NONE}, /* SP */ - {3, 0, 0, 0, &mach_reg[1], RCF_NONE}, /* DP */ - {6, 0, 0, 0, &mach_reg[0], RCF_NONE}, /* AR */ - {3, 0, 0, 0, &mach_reg[0], RCF_NONE}, /* KR */ - {0, 0, 0, 0, 0, 0}, /* VECT */ - {0, 0, 0, 0, 0, 0}, /* QP */ - {3, 0, 0, 0, 0, RCF_NONE}, /* CSP */ - {3, 0, 0, 0, 0, RCF_NONE}, /* CDP */ - {0, 0, 0, 0, 0, 0}, /* CQP */ - {0, 0, 0, 0, 0, 0}, /* X87 */ - {0, 0, 0, 0, 0, 0}, /* CX87 */ - /* the following will be mapped over SP and DP above */ - {3, 0, 0, 0, &mach_reg[2], RCF_NONE}, /* SPXM */ - {3, 0, 0, 0, &mach_reg[2], RCF_NONE}, /* DPXM */ -}; +static MACH_REG mach_reg[MR_UNIQ] = MACH_REGS; + +REG reg[RATA_RTYPES_TOTAL] = REGS(mach_reg); RGSETB rgsetb; -const int scratch_regs[3] = {IR_RAX, IR_RCX, IR_RDX}; +const int scratch_regs[] = SCRATCH_REGS; -#if defined(TARGET_LLVM_ARM) || defined(TARGET_LLVM_POWER) +#if defined(TARGET_LLVM_ARM) + +/* xmm0 --> xmm7 */ +int mr_arg_xr[MR_MAX_XREG_ARGS + 1] = {XR_XMM0, XR_XMM1, XR_XMM2, XR_XMM3, + XR_XMM4, XR_XMM5, XR_XMM6, XR_XMM7}; + +/* return result registers */ +/* rax, rdx */ +int mr_res_ir[MR_MAX_IREG_RES + 1] = {IR_RAX, IR_RDX}; +/* xmm0, xmm1 */ +int mr_res_xr[MR_MAX_XREG_RES + 1] = {XR_XMM0, XR_XMM1}; + +#elif defined(TARGET_LLVM_POWER) -/* arguments passed in registers */ -int mr_arg_ir[MR_MAX_IREG_ARGS + 1]; /* xmm0 --> xmm7 */ int mr_arg_xr[MR_MAX_XREG_ARGS + 1] = {XR_XMM0, XR_XMM1, XR_XMM2, XR_XMM3, XR_XMM4, XR_XMM5, XR_XMM6, XR_XMM7}; @@ -148,17 +137,6 @@ mr_init() } -static int -mr_isxmm(int rtype) -{ -#if DEBUG - assert((rtype == RATA_SP || rtype == RATA_DP || rtype == RATA_CSP || - rtype == RATA_CDP), - "mr_isxmm bad rtype", rtype, ERR_Severe); -#endif - return (reg[rtype].mach_reg->Class == 'x'); -} - void mr_reset_numglobals(int reduce_by) { @@ -168,9 +146,7 @@ mr_reset_numglobals(int reduce_by) void mr_reset_frglobals() { - /* effectively turn off fp global regs. */ - mach_reg[1].last_global = mach_reg[1].first_global - 1; - mach_reg[2].last_global = mach_reg[2].first_global - 1; + MR_RESET_FRGLOBALS(mach_reg); } /** \brief get a global register for a given register type (RATA_IR, etc.). @@ -231,19 +207,6 @@ _mr_getreg(int rtype) return (mr->next_global++); } -/** \brief map a register type and global register number to an index value in - * the range 0 .. MR_NUMGLB-1, taking into consideration that certain - * register types map to the same machine register set. - * - * This is used by * the optimizer to index into its register history table. - */ -int -mr_gindex(int rtype, int regno) -{ - MACH_REG *mr = reg[rtype].mach_reg; - return ((regno - mr->first_global) + mr->mapbase); -} - /** \brief communicate to the scheduler the first global register not assigned * for each register class * @@ -264,13 +227,6 @@ mr_end() } -void -static mr_reset_fpregs() -{ - mach_reg[1].next_global = mach_reg[1].first_global; - mach_reg[2].next_global = mach_reg[2].first_global; -} - /** \brief Initialize for scanning the entire machine register set used for * rtype. * @@ -347,33 +303,6 @@ int _mr_getnext(int rtype) return mreg; } -/* RGSET functions */ -static void -mr_init_rgset() -{ - RGSET tmp; - int bihx; - -/* just verify that regs all fit in RGSET fields. (+1 below is because - * current RGSET macro's assume regs start at 1, position 0 in bitfields - * is wasted. TST_ and SET_ macros could be changed along with these - * asserts to save the bit. - */ - assert(sizeof(tmp.xr) * 8 >= mach_reg[2].max + 1, "RGSET xr ops invalid", 0, - ERR_Severe); - - rgsetb.stg_avail = 1; - - /* make sure BIH_RGSET fields are fresh. */ - bihx = gbl.entbih; - for (;;) { - BIH_RGSET(bihx) = 0; - if (BIH_LAST(bihx)) - break; - bihx = BIH_NEXT(bihx); - } -} - /** \brief allocate and initialize a RGSET entry. */ int mr_get_rgset() @@ -392,53 +321,3 @@ mr_get_rgset() return rgset; } - -static void -mr_dmp_rgset(int rgseti) -{ - int i; - int cnt = 0; - - fprintf(gbl.dbgfil, "rgset %d:", rgseti); - if (rgseti == 0) { - fprintf(gbl.dbgfil, " null"); - assert(RGSET_XR(0) == 0, "mr_dmp_rgset says someone was writing 0", 0, ERR_Severe); - } - for (i = XR_FIRST; i <= XR_LAST; i++) { - if (TST_RGSET_XR(rgseti, i)) { - fprintf(gbl.dbgfil, " xmm%d", i); - cnt++; - } - } - fprintf(gbl.dbgfil, " total %d\n", cnt); -} - -/* called from flow.c to tell globalreg, and scheduler which - xmm regs are used by the vectorizer. - */ -static void -mr_bset_xmm_rgset(int ili, int bih) -{ - int j, opn; - ILI_OP opc; - int noprs; - - if (BIH_RGSET(bih) == 0) { - BIH_RGSET(bih) = mr_get_rgset(); - } - - opc = ILI_OPC(ili); - noprs = ilis[opc].oprs; - for (j = 1; j <= noprs; j++) { - opn = ILI_OPND(ili, j); - switch (IL_OPRFLAG(opc, j)) { - case ILIO_XMM: - assert(opn >= XR_FIRST && opn <= XR_LAST, - "mr_bset_xmm_rgset: bad xmm register value", ili, ERR_Warning); - SET_RGSET_XR(BIH_RGSET(bih), opn); - break; - default: - break; - } - } -} diff --git a/tools/flang2/flang2exe/ppc64le-Linux/machreg.h b/tools/flang2/flang2exe/ppc64le-Linux/machreg.h index a43a75804ad..f44e81d3caa 100644 --- a/tools/flang2/flang2exe/ppc64le-Linux/machreg.h +++ b/tools/flang2/flang2exe/ppc64le-Linux/machreg.h @@ -193,7 +193,6 @@ extern char *zm_reg[MAX_N_XMM_REGS + 1]; /* ZMM_REG_NAMES */ /* Use macros ARG_IR, ARG_XR, etc. */ -extern int mr_arg_ir[MR_MAX_IREG_ARGS + 1]; /* defd in machreg.c */ extern int mr_arg_xr[MR_MAX_XREG_ARGS + 1]; /* defd in machreg.c */ extern int mr_res_ir[MR_MAX_IREG_RES + 1]; extern int mr_res_xr[MR_MAX_XREG_RES + 1]; @@ -260,13 +259,6 @@ extern int mr_res_xr[MR_MAX_XREG_RES + 1]; */ #define MR_IR_AVAIL(c) 0 -/* Define gindex bounds for the set of global irs/ars and scratch - * irs/ars. MUST BE CONSISTENT with mr_gindex(). - */ -#define MR_GI_IR_LOW 0 -#define MR_GI_IR_HIGH (MR_U1 - MR_L1) -#define MR_GI_IS_SCR_IR(i) ((i) > (MR_U1 - MR_L1)) - /* Machine Register Information - * * This information is in two pieces: @@ -331,17 +323,8 @@ typedef struct {/* three -word bit-vector */ int xr; } RGSET; -#define RGSETG(i) rgsetb.stg_base[i] - #define RGSET_XR(i) rgsetb.stg_base[i].xr -#define SET_RGSET_XR(i, reg) \ - { \ - RGSET_XR(i) |= (1 << (reg)); \ - } - -#define TST_RGSET_XR(i, reg) ((RGSET_XR(i) >> (reg)) & 1) - typedef struct { RGSET *stg_base; int stg_avail; @@ -353,12 +336,47 @@ typedef struct { extern REG reg[]; extern RGSETB rgsetb; +#define SCRATCH_REGS {IR_RAX, IR_RCX, IR_RDX} + +#define MACH_REGS \ + { \ + {1, 8, 8 /*TBD*/, MR_L1, MR_U1, MR_U1, MR_U1, 0, 0, 'i'}, /* %r's */ \ + {1, 8, 8 /*TBD*/, MR_L2, MR_U2, MR_U2, MR_U2, 0, MR_MAX1, 'f'}, /* %f's */ \ + {1, 8, 8 /*TBD*/, MR_L3, MR_U3, MR_U3, MR_U3, 0, (MR_MAX1 + MR_MAX2), \ + 'x'} /* %f's xmm */ \ + } + +#define REGS(mach_regs) \ + { \ + {6, 0, 0, 0, &((mach_regs)[0]), RCF_NONE}, /* IR */ \ + {3, 0, 0, 0, &((mach_regs)[1]), RCF_NONE}, /* SP */ \ + {3, 0, 0, 0, &((mach_regs)[1]), RCF_NONE}, /* DP */ \ + {6, 0, 0, 0, &((mach_regs)[0]), RCF_NONE}, /* AR */ \ + {3, 0, 0, 0, &((mach_regs)[0]), RCF_NONE}, /* KR */ \ + {0, 0, 0, 0, 0, 0}, /* VECT */ \ + {0, 0, 0, 0, 0, 0}, /* QP */ \ + {3, 0, 0, 0, 0, RCF_NONE}, /* CSP */ \ + {3, 0, 0, 0, 0, RCF_NONE}, /* CDP */ \ + {0, 0, 0, 0, 0, 0}, /* CQP */ \ + {0, 0, 0, 0, 0, 0}, /* X87 */ \ + {0, 0, 0, 0, 0, 0}, /* CX87 */ \ + /* the following will be mapped over SP and DP above */ \ + {3, 0, 0, 0, &((mach_regs)[2]), RCF_NONE}, /* SPXM */ \ + {3, 0, 0, 0, &((mach_regs)[2]), RCF_NONE}, /* DPXM */ \ + } + +#define MR_RESET_FRGLOBALS(mach_regs) \ + { \ + /* effectively turn off fp global regs. */ \ + (mach_regs)[1].last_global = mach_reg[1].first_global - 1; \ + (mach_regs)[2].last_global = mach_reg[2].first_global - 1; \ + } + /***** External Function Declarations *****/ int mr_getnext(int rtype); int mr_getreg(int rtype); int mr_get_rgset(); - int mr_gindex(int rtype, int regno); void mr_end(); void mr_init(); void mr_reset_frglobals(); diff --git a/tools/flang2/flang2exe/x86_64-Linux/machreg.h b/tools/flang2/flang2exe/x86_64-Linux/machreg.h index 3be40d26786..188b39577ae 100644 --- a/tools/flang2/flang2exe/x86_64-Linux/machreg.h +++ b/tools/flang2/flang2exe/x86_64-Linux/machreg.h @@ -417,13 +417,6 @@ extern int mr_res_xr[MR_MAX_XREG_RES]; */ #define MR_IR_AVAIL(c) 0 -/* Define gindex bounds for the set of global irs/ars and scratch - * irs/ars. MUST BE CONSISTENT with mr_gindex(). - */ -#define MR_GI_IR_LOW 0 -#define MR_GI_IR_HIGH (MR_U1 - MR_L1) -#define MR_GI_IS_SCR_IR(i) ((i) > (MR_U1 - MR_L1)) - /* Machine Register Information - * * This information is in two pieces: @@ -488,17 +481,8 @@ typedef struct {/* three -word bit-vector */ int xr; } RGSET; -#define RGSETG(i) rgsetb.stg_base[i] - #define RGSET_XR(i) rgsetb.stg_base[i].xr -#define SET_RGSET_XR(i, reg) \ - { \ - RGSET_XR(i) |= (1 << (reg)); \ - } - -#define TST_RGSET_XR(i, reg) ((RGSET_XR(i) >> (reg)) & 1) - typedef struct { RGSET *stg_base; int stg_avail; @@ -510,6 +494,42 @@ typedef struct { extern REG reg[]; extern RGSETB rgsetb; +#define SCRATCH_REGS {IR_RAX, IR_RCX, IR_RDX} + +#define MACH_REGS \ + { \ + {1, 8, 8 /*TBD*/, MR_L1, MR_U1, MR_U1, MR_U1, 0, 0, 'i'}, /* %r's */ \ + {1, 8, 8 /*TBD*/, MR_L2, MR_U2, MR_U2, MR_U2, 0, MR_MAX1, 'f'}, /* %f's */ \ + {1, 8, 8 /*TBD*/, MR_L3, MR_U3, MR_U3, MR_U3, 0, (MR_MAX1 + MR_MAX2), \ + 'x'} /* %f's xmm */ \ + } + +#define REGS(mach_regs) \ + { \ + {6, 0, 0, 0, &((mach_regs)[0]), RCF_NONE}, /* IR */ \ + {3, 0, 0, 0, &((mach_regs)[1]), RCF_NONE}, /* SP */ \ + {3, 0, 0, 0, &((mach_regs)[1]), RCF_NONE}, /* DP */ \ + {6, 0, 0, 0, &((mach_regs)[0]), RCF_NONE}, /* AR */ \ + {3, 0, 0, 0, &((mach_regs)[0]), RCF_NONE}, /* KR */ \ + {0, 0, 0, 0, 0, 0}, /* VECT */ \ + {0, 0, 0, 0, 0, 0}, /* QP */ \ + {3, 0, 0, 0, 0, RCF_NONE}, /* CSP */ \ + {3, 0, 0, 0, 0, RCF_NONE}, /* CDP */ \ + {0, 0, 0, 0, 0, 0}, /* CQP */ \ + {0, 0, 0, 0, 0, 0}, /* X87 */ \ + {0, 0, 0, 0, 0, 0}, /* CX87 */ \ + /* the following will be mapped over SP and DP above */ \ + {3, 0, 0, 0, &((mach_regs)[2]), RCF_NONE}, /* SPXM */ \ + {3, 0, 0, 0, &((mach_regs)[2]), RCF_NONE}, /* DPXM */ \ + } + +#define MR_RESET_FRGLOBALS(mach_regs) \ + { \ + /* effectively turn off fp global regs. */ \ + (mach_regs)[1].last_global = mach_reg[1].first_global - 1; \ + (mach_regs)[2].last_global = mach_reg[2].first_global - 1; \ + } + /***** External Function Declarations *****/ /** @@ -527,11 +547,6 @@ int mr_getreg(int rtype); */ int mr_get_rgset(void); -/** - \brief ... - */ -int mr_gindex(int rtype, int regno); - /** \brief ... */