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Add default build for analog ports for apard32690 board.
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Makefile

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@@ -299,6 +299,9 @@ update-frozen-libraries:
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one-of-each: samd21 litex mimxrt10xx nordic stm
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analog:
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$(MAKE) -C ports/analog/ BOARD=apard32690
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samd21:
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$(MAKE) -C ports/atmel-samd BOARD=trinket_m0
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ports/analog/Makefile

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@@ -6,12 +6,13 @@
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#
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# SPDX-License-Identifier: MIT
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BOARD ?= apard32690
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CROSS_COMPILE = arm-none-eabi-
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# Includes mpconfigboard.mk & mpconfigport.mk,
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# along with numerous other shared environment makefiles.
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include ../../py/circuitpy_mkenv.mk
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CROSS_COMPILE = arm-none-eabi-
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# MCU_SERIES e.g. "max32"
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# MCU_VARIANT e.g. "max32690"
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# defined in mpconfigboard.mk
@@ -20,6 +21,7 @@ MCU_SERIES_UPPER := $(shell echo $(MCU_SERIES) | tr '[:lower:]' '[:upper:]')
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MCU_VARIANT_LOWER := $(shell echo $(MCU_VARIANT) | tr '[:upper:]' '[:lower:]')
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MCU_VARIANT_UPPER := $(shell echo $(MCU_VARIANT) | tr '[:lower:]' '[:upper:]')
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# *******************************************************************************
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#### MSDK INCLUDES ####
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# Necessary for msdk makefiles
@@ -59,6 +61,7 @@ DIE_TYPE=me18
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endif
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PERIPH_SRC = $(ADI_PERIPH)/Source
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PERIPH_INC = $(ADI_PERIPH)/Include/$(MCU_VARIANT_UPPER)
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INC += -I.
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INC += -I../..
@@ -75,7 +78,7 @@ INC += \
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-I$(TOP)/lib/cmsis/inc \
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-I$(CMSIS_ROOT)/Include \
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-I$(CMSIS_ROOT)/Device/Maxim/$(MCU_VARIANT_UPPER)/Include \
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-I$(ADI_PERIPH)/Include/$(MCU_VARIANT_UPPER) \
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-I$(PERIPH_INC) \
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-I$(PERIPH_SRC)/SYS \
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-I$(PERIPH_SRC)/CTB \
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-I$(PERIPH_SRC)/DMA \
@@ -126,7 +129,8 @@ SRC_C += $(SRC_MAX32) \
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boards/$(BOARD)/board.c \
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boards/$(BOARD)/pins.c \
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peripherals/$(MCU_VARIANT_LOWER)/pins.c \
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peripherals/$(MCU_VARIANT_LOWER)/gpios.c
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peripherals/$(MCU_VARIANT_LOWER)/gpios.c \
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peripherals/$(MCU_VARIANT_LOWER)/max32_uart.c
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# *******************************************************************************
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### Compiler & Linker Flags ###

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