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update fn pckcerts_with_fallback
New logic will get following PKC certs: - PCKID CPUSVN - CPUSVN all 1's - For every CPUSVN we try where the late microcode value is higher than the early microcode value, the CPUSVN where the early microcode value is set to the late microcode value.
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+69
-1
lines changed

3 files changed

+69
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lines changed

intel-sgx/dcap-artifact-retrieval/src/provisioning_client/mod.rs

Lines changed: 17 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -596,11 +596,27 @@ pub trait ProvisioningClient {
596596
let tcb_info = self.tcbinfo(&fmspc, None)?;
597597
let tcb_data = tcb_info.data()?;
598598
let mut pcks = HashMap::new();
599+
// Getting PCK cert using CPUSVN from PCKID
599600
{
600601
let ptcb = pck_cert.platform_tcb()?;
601602
pcks.insert((ptcb.cpusvn, ptcb.tcb_components.pce_svn()), pck_cert);
602603
}
603-
for (cpu_svn, pce_isvsvn) in tcb_data.iter_tcb_components() {
604+
// Getting PCK cert using CPUSVN all 1's
605+
{
606+
let pck_cert = self.pckcert(
607+
Some(&pck_id.enc_ppid),
608+
&pck_id.pce_id,
609+
&[u8::MAX; 16],
610+
pck_id.pce_isvsvn,
611+
Some(&pck_id.qe_id),
612+
)?;
613+
let ptcb = pck_cert.platform_tcb()?;
614+
pcks.insert((ptcb.cpusvn, ptcb.tcb_components.pce_svn()), pck_cert);
615+
}
616+
// For every CPUSVN we try where the late microcode value is higher
617+
// than the early microcode value, the CPUSVN where the early
618+
// microcode value is set to the late microcode value
619+
for (cpu_svn, pce_isvsvn) in tcb_data.iter_tcb_components_with_late_tcb_override() {
604620
let p = match self.pckcert(
605621
Some(&pck_id.enc_ppid),
606622
&pck_id.pce_id,

intel-sgx/pcs/src/pckcrt.rs

Lines changed: 37 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -158,6 +158,43 @@ impl TcbComponents {
158158
}
159159
out
160160
}
161+
162+
/// The CPUSVN where the early microcode value is set to the late microcode
163+
/// value when the late microcode value is higher than the early microcode
164+
/// value. For example:
165+
/// ```json
166+
/// [{
167+
/// "svn": 7,
168+
/// "category": "BIOS",
169+
/// "type": "Early Microcode Update"
170+
/// },
171+
/// {
172+
/// "svn": 9,
173+
/// "category": "OS/VMM",
174+
/// "type": "SGX Late Microcode Update"
175+
/// }]
176+
/// ```
177+
/// Here 7 will be set to 9.
178+
pub fn cpu_svn_late_override_early(&self) -> CpuSvn {
179+
// NOTE: to support older stable compilers (pre 1.77) we are avoiding
180+
// the obvious implementation:
181+
//
182+
// self.0.sgxtcbcomponents.each_ref().map(|c| c.svn)
183+
let mut out: CpuSvn = [0u8; 16];
184+
let tcb_components = &self.0.sgxtcbcomponents;
185+
out[15] = tcb_components[15].svn;
186+
for i in 0..15 {
187+
if tcb_components[i].comp_type.as_str() == "Early Microcode Update"
188+
&& tcb_components[i+1].comp_type.as_str() == "SGX Late Microcode Update"
189+
&& tcb_components[i+1].svn > tcb_components[i].svn
190+
{
191+
out[i] = tcb_components[i+1].svn
192+
} else {
193+
out[i] = tcb_components[i].svn;
194+
}
195+
}
196+
out
197+
}
161198
}
162199

163200
impl PartialOrd for TcbComponents {

intel-sgx/pcs/src/tcb_info.rs

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -326,6 +326,21 @@ impl<V: VerificationType> TcbData<V> {
326326
pub fn iter_tcb_components(&self) -> impl Iterator<Item = (CpuSvn, PceIsvsvn)> + '_ {
327327
self.tcb_levels.iter().map(|tcb_level| (tcb_level.tcb.cpu_svn(), tcb_level.tcb.pce_svn()))
328328
}
329+
330+
/// For every CPUSVN where the late microcode value is higher
331+
/// than the early microcode value, the CPUSVN where the early
332+
/// microcode value is set to the late microcode value
333+
pub fn iter_tcb_components_with_late_tcb_override(&self) -> impl Iterator<Item = (CpuSvn, PceIsvsvn)> + '_ {
334+
self.tcb_levels.iter().map(|tcb_level| {
335+
let overridden_svn = tcb_level.tcb.cpu_svn_late_override_early();
336+
let cpu_svn = tcb_level.tcb.cpu_svn();
337+
if cpu_svn != overridden_svn{
338+
(overridden_svn, tcb_level.tcb.pce_svn())
339+
} else {
340+
(cpu_svn, tcb_level.tcb.pce_svn())
341+
}
342+
})
343+
}
329344
}
330345

331346
#[derive(Clone, Serialize, Deserialize, Debug, Eq, PartialEq)]

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