Skip to content

Commit fe45baf

Browse files
bors[bot]Jethro Beekman
andauthored
Merge #372
372: Fix various deprecation warnings r=raoulstrackx a=jethrogb Co-authored-by: Jethro Beekman <[email protected]>
2 parents 4c77b21 + 655baae commit fe45baf

File tree

8 files changed

+31
-25
lines changed

8 files changed

+31
-25
lines changed

intel-sgx/aesm-client/build.rs

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,8 @@
44
* License, v. 2.0. If a copy of the MPL was not distributed with this
55
* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
66

7+
#![deny(warnings)]
8+
79
extern crate protoc_rust;
810

911
use std::env;
@@ -14,13 +16,11 @@ use std::path::PathBuf;
1416
fn main() {
1517
let out_dir = PathBuf::from(env::var("OUT_DIR").expect("cargo should set OUT_DIR"));
1618

17-
protoc_rust::run(protoc_rust::Args {
18-
out_dir: out_dir.to_str().expect("OUT_DIR must be valid UTF-8"),
19-
input: &["src/aesm_proto.proto"],
20-
includes: &[],
21-
customize: Default::default(),
22-
})
23-
.expect("protoc");
19+
protoc_rust::Codegen::new()
20+
.out_dir(&out_dir)
21+
.input("src/aesm_proto.proto")
22+
.run()
23+
.expect("protoc");
2424

2525
// Because of https://github.com/rust-lang/rfcs/issues/752, we can't `include!` the generated
2626
// protobufs directly. Instead, we generate a second generated file that can be `include!`-ed.

intel-sgx/enclave-runner/src/lib.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
* License, v. 2.0. If a copy of the MPL was not distributed with this
55
* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
66

7+
#![deny(warnings)]
78
#![feature(asm)]
89
#![doc(
910
html_logo_url = "https://edp.fortanix.com/img/docs/edp-logo.svg",

intel-sgx/enclave-runner/src/loader.rs

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -102,6 +102,9 @@ impl From<DebugBuffer> for EnclavePanic {
102102
#[derive(Debug)]
103103
pub(crate) struct ErasedTcs {
104104
address: *mut c_void,
105+
// This represents a resource so we need to maintain ownership even if not
106+
// used
107+
#[allow(dead_code)]
105108
tcs: Box<dyn Tcs>,
106109
}
107110

intel-sgx/enclave-runner/src/tcs.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -113,7 +113,7 @@ pub(crate) fn coenter<T: Tcs>(
113113
user_handler: u64,
114114
user_data: u64,
115115
reserved: [u64; 27],
116-
};
116+
}
117117

118118
impl fmt::Debug for SgxEnclaveRun {
119119
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {

intel-sgx/sgxs-tools/src/bin/sgxs-load.rs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,8 @@
44
* License, v. 2.0. If a copy of the MPL was not distributed with this
55
* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
66

7+
// Will be fixed in https://github.com/fortanix/rust-sgx/pull/369
8+
#![allow(deprecated)]
79
#![feature(llvm_asm)]
810
extern crate aesm_client;
911
extern crate clap;

intel-sgx/sgxs-tools/src/sgx_detect/main.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -147,7 +147,7 @@ pub struct SgxSupport {
147147
aesm_service: Result<TimeoutHardError<AesmClient>, Rc<Error>>,
148148
aesm_status: Option<AesmStatus>,
149149
#[serde(skip, default)]
150-
dcap_library: bool,
150+
_dcap_library: bool,
151151
#[serde(skip, default = "no_deserialize")]
152152
loader_sgxdev: Result<Rc<RefCell<SgxDevice>>, Rc<Error>>,
153153
#[serde(skip, default = "no_deserialize")]
@@ -168,7 +168,7 @@ struct FailTrace<'a>(pub &'a Error);
168168
impl<'a> fmt::Display for FailTrace<'a> {
169169
fn fmt(&self, fmt: &mut fmt::Formatter) -> fmt::Result {
170170
write!(fmt, "{}", self.0)?;
171-
for cause in self.0.causes() {
171+
for cause in self.0.iter_causes() {
172172
write!(fmt, "\ncause: {}", cause)?;
173173
}
174174
Ok(())
@@ -333,7 +333,7 @@ impl SgxSupport {
333333
efi_softwareguardstatus: rcerr(efi_softwareguardstatus),
334334
aesm_service: rcerr(aesm_service),
335335
aesm_status,
336-
dcap_library,
336+
_dcap_library: dcap_library,
337337
loader_sgxdev: rcerr(loader_sgxdev),
338338
sgxdev_status: rcerr(sgxdev_status),
339339
loader_encllib: rcerr(loader_encllib),

ipc-queue/src/fifo.rs

Lines changed: 12 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@
66

77
use std::cell::UnsafeCell;
88
use std::mem;
9-
use std::sync::atomic::{AtomicU64, AtomicUsize, Ordering};
9+
use std::sync::atomic::{AtomicU64, AtomicUsize, Ordering, Ordering::SeqCst};
1010
use std::sync::Arc;
1111

1212
use fortanix_sgx_abi::{FifoDescriptor, WithId};
@@ -152,7 +152,7 @@ impl<T: Transmittable> Fifo<T> {
152152
pub(crate) fn try_send_impl(&self, val: Identified<T>) -> Result</*wake up reader:*/ bool, TrySendError> {
153153
let (new, was_empty) = loop {
154154
// 1. Load the current offsets.
155-
let current = Offsets::new(self.offsets.load(Ordering::SeqCst), self.data.len() as u32);
155+
let current = Offsets::new(self.offsets.load(SeqCst), self.data.len() as u32);
156156
let was_empty = current.is_empty();
157157

158158
// 2. If the queue is full, wait, then go to step 1.
@@ -164,24 +164,23 @@ impl<T: Transmittable> Fifo<T> {
164164
// with the current offsets. If the CAS was not succesful, go to step 1.
165165
let new = current.increment_write_offset();
166166
let current = current.as_usize();
167-
let prev = self.offsets.compare_and_swap(current, new.as_usize(), Ordering::SeqCst);
168-
if prev == current {
167+
if self.offsets.compare_exchange(current, new.as_usize(), SeqCst, SeqCst).is_ok() {
169168
break (new, was_empty);
170169
}
171170
};
172171

173172
// 4. Write the data, then the `id`.
174173
let slot = unsafe { &mut *self.data[new.write_offset()].get() };
175174
slot.data = val.data;
176-
slot.id.store(val.id, Ordering::SeqCst);
175+
slot.id.store(val.id, SeqCst);
177176

178177
// 5. If the queue was empty in step 1, signal the reader to wake up.
179178
Ok(was_empty)
180179
}
181180

182181
pub(crate) fn try_recv_impl(&self) -> Result<(Identified<T>, /*wake up writer:*/ bool), TryRecvError> {
183182
// 1. Load the current offsets.
184-
let current = Offsets::new(self.offsets.load(Ordering::SeqCst), self.data.len() as u32);
183+
let current = Offsets::new(self.offsets.load(SeqCst), self.data.len() as u32);
185184

186185
// 2. If the queue is empty, wait, then go to step 1.
187186
if current.is_empty() {
@@ -194,7 +193,7 @@ impl<T: Transmittable> Fifo<T> {
194193
let (slot, id) = loop {
195194
// 4. Read the `id` at the new read offset.
196195
let slot = unsafe { &mut *self.data[new.read_offset()].get() };
197-
let id = slot.id.load(Ordering::SeqCst);
196+
let id = slot.id.load(SeqCst);
198197

199198
// 5. If `id` is `0`, go to step 4 (spin). Spinning is OK because data is
200199
// expected to be written imminently.
@@ -205,13 +204,13 @@ impl<T: Transmittable> Fifo<T> {
205204

206205
// 6. Read the data, then store `0` in the `id`.
207206
let val = Identified { id, data: slot.data };
208-
slot.id.store(0, Ordering::SeqCst);
207+
slot.id.store(0, SeqCst);
209208

210209
// 7. Store the new read offset, retrieving the old offsets.
211210
let before = fetch_adjust(
212211
self.offsets,
213212
new.read as isize - current.read as isize,
214-
Ordering::SeqCst,
213+
SeqCst,
215214
);
216215

217216
// 8. If the queue was full before step 7, signal the writer to wake up.
@@ -288,7 +287,6 @@ impl Offsets {
288287
mod tests {
289288
use super::*;
290289
use crate::test_support::{NoopSynchronizer, TestValue};
291-
use std::sync::atomic::{AtomicUsize, Ordering};
292290
use std::sync::mpsc;
293291
use std::thread;
294292

@@ -367,10 +365,10 @@ mod tests {
367365
#[test]
368366
fn fetch_adjust_correctness() {
369367
let x = AtomicUsize::new(0);
370-
fetch_adjust(&x, 5, Ordering::SeqCst);
371-
assert_eq!(x.load(Ordering::SeqCst), 5);
372-
fetch_adjust(&x, -3, Ordering::SeqCst);
373-
assert_eq!(x.load(Ordering::SeqCst), 2);
368+
fetch_adjust(&x, 5, SeqCst);
369+
assert_eq!(x.load(SeqCst), 5);
370+
fetch_adjust(&x, -3, SeqCst);
371+
assert_eq!(x.load(SeqCst), 2);
374372
}
375373

376374
#[test]

ipc-queue/src/lib.rs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,8 @@
44
* License, v. 2.0. If a copy of the MPL was not distributed with this
55
* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
66

7+
#![deny(warnings)]
8+
79
#![cfg_attr(target_env = "sgx", feature(sgx_platform))]
810

911
use std::future::Future;

0 commit comments

Comments
 (0)