Modify HSDK to release candidate

Add generating files for u-boot update
Add some packages to defconfig

Author: EvgeniiDidin

board/synopsys/hsdk/genimage.cfg

@@ -2,7 +2,10 @@ image boot.vfat {
   vfat {
     files = {
       "uboot.env",
-      "uImage"
+      "uImage",
+      "u-boot",
+      "u-boot.head",
+      "hsdk.dtb"
     }
   }
   size = 100M

board/synopsys/hsdk/headerise.py

@@ -0,0 +1,125 @@
+import os, getopt, sys, zlib
+#we can use binascii instead of zlib
+
+def usage(exit_code):
+    print("usage:")
+    print(sys.argv[0] + " --arc-id 0x52 --image u-boot.bin --elf u-boot")
+    sys.exit(exit_code)
+
+def main():
+    try:
+        opts, args = getopt.getopt(sys.argv[1:],
+            "ha:i:l:e:", ["help", "arc-id=", "image=", "elf=", "env="])
+    except getopt.GetoptError as err:
+        print(err)
+        usage(2)
+
+    # default filenames
+    uboot_bin_filename  = "u-boot.bin"
+    uboot_elf_filename  = "u-boot"
+    headerised_filename = "u-boot.head"
+    uboot_default_env   = "u-boot-env.txt"
+    uboot_patched_env   = "u-boot-p-env.txt"
+
+    # initial header values
+    arc_id          = 0x52
+    uboot_img_size  = 0x0497fc
+    check_sum       = 0x61
+    image_copy_adr  = 0x81000000
+    magic1          = 0xdeadbeafaf # big endian byte order
+    jump_address    = 0x81000000
+    flash_address   = 0x0
+    flash_type      = 0x0          # 0 - SPI flash, 1 - NOR flash
+    magic2          = [            # big endian byte order
+    0x20202a2020202020202020202a20202020207c5c2e20202020202e2f7c20202020207c2d,
+    0x2e5c2020202f2e2d7c20202020205c2020602d2d2d6020202f20202020202f205f202020,
+    0x205f20205c20202020207c205f60712070205f207c2020202020272e5f3d2f205c3d5f2e,
+    0x272020202020202020605c202f60202020202020202020202020206f2020202020202020]
+
+    for opt, arg in opts:
+        if opt in ('-h', "--help"):   usage(0)
+        if opt in ('-a', "--arc-id"): arc_id = int(arg, 16)
+        if opt in ('-i', "--image"):  uboot_bin_filename = arg
+        if opt in ('-l', "--elf"):    uboot_elf_filename = arg
+        if opt in ('-e', "--env"):    uboot_default_env  = arg
+
+    # verify args:
+    if arc_id not in [0x52, 0x53]:
+        print("unknown ARC ID: " + hex(arc_id))
+        sys.exit(2)
+
+    if not os.path.isfile(uboot_bin_filename):
+        print("uboot bin file not exists: " + uboot_bin_filename)
+        sys.exit(2)
+
+    if not os.path.isfile(uboot_default_env):
+        print("uboot defaul environment file not exists: " + uboot_default_env)
+        sys.exit(2)
+
+    uboot_img_size = os.path.getsize(uboot_bin_filename)
+
+    # Calculate u-boot image check_sum: it is sum of all u-boot binary bytes
+    with open(uboot_bin_filename, "rb") as file:
+        ba = bytearray(file.read())
+    check_sum = sum(ba) & 0xFF
+
+    # write header to file
+    with open(headerised_filename, "wb") as file:
+        file.write(arc_id.to_bytes(2, byteorder='little'))
+        file.write(uboot_img_size.to_bytes(4, byteorder='little'))
+        file.write(check_sum.to_bytes(1, byteorder='little'))
+        file.write(image_copy_adr.to_bytes(4, byteorder='little'))
+        file.write(magic1.to_bytes(5, byteorder='big'))
+        file.write(jump_address.to_bytes(4, byteorder='little'))
+        for i in range(12): file.write(0xFF.to_bytes(1, byteorder='little'))
+        for byte in magic2: file.write(byte.to_bytes(36, byteorder='big'))
+        for i in range(208 - len(magic2) * 36):
+            file.write(0xFF.to_bytes(1, byteorder='little'))
+        file.write(flash_address.to_bytes(4, byteorder='little'))
+        for i in range(11): file.write(0xFF.to_bytes(1, byteorder='little'))
+        file.write(flash_type.to_bytes(1, byteorder='little'))
+
+    # append u-boot image to header
+    with open(headerised_filename, "ab") as fo:
+        with open(uboot_bin_filename,'rb') as fi:
+            fo.write(fi.read())
+
+    # calc u-boot headerised image CRC32 (will be used by uboot update
+    # command for check)
+    headerised_image_crc = ""
+    with open(headerised_filename, "rb") as fi:
+        headerised_image_crc = hex(zlib.crc32(fi.read()) & 0xffffffff)
+    print("image CRC32 = " + headerised_image_crc)
+
+    load_addr = 0x81000000
+    load_size = os.path.getsize(headerised_filename)
+
+#    print("crc32 " + hex(load_addr) + " " + hex (load_size))
+
+    # make errase size to be allighned by 64K
+    if load_size & 0xFFFF == 0:
+        errase_size = load_size
+    else:
+        errase_size = load_size - (load_size & 0xFFFF) + 0x10000
+
+    # u-bood CMD to load u-bood with header to SPI flash
+    sf_load_image_cmd = \
+        "fatload mmc 0:1 " + hex(load_addr) + " " + headerised_filename + " && " + \
+        "sf probe 0:0 && " + \
+        "sf protect unlock 0x0 " + hex(errase_size) + " && " + \
+        "sf erase 0x0 " + hex(errase_size) + " && " + \
+        "sf write " + hex(load_addr) + " 0x0 " + hex(errase_size) + " && " + \
+        "sf protect lock 0x0 " + hex(errase_size)
+
+    update_uboot_cmd = "update_uboot=" + \
+        sf_load_image_cmd + " && echo \"u-boot update: OK\""
+
+    # append default environment with update commands
+    with open(uboot_default_env, "rb") as fi:
+        with open(uboot_patched_env, 'wb') as fo:
+            fo.write(fi.read())
+            fo.write(update_uboot_cmd.encode('ascii'))
+
+
+if __name__ == "__main__":
+    main()

board/synopsys/hsdk/linux-patches/0001-ARC-setup-cpu-possible-mask-according-to-status-fiel.patch

@@ -0,0 +1,115 @@
+From 69175409cd952276c93653891da77fdb34aebc5e Mon Sep 17 00:00:00 2001
+From: Eugeniy Paltsev <[email protected]>
+Date: Fri, 22 Dec 2017 20:17:20 +0300
+Subject: [RFC] ARC: setup cpu possible mask according to status field in dts
+
+As we have option in u-boot to set CPU mask for running linux,
+we want to pass information to kernel about CPU cores should
+be brought up.
+
+So we patch kernel dtb in u-boot to set CPUs status.
+
+On linux boot we setup cpu possible mask according to status
+field in each cpu node. It is generic method according to ePAPR:
+  status - a standard property describing the state of a CPU.
+  This property shall be present for nodes representing CPUs in a
+  symmetric multiprocessing (SMP) configuration. For a CPU node
+  the meaning of the "okay" and "disabled" values are as follows:
+  "okay" - The CPU is running; "disabled" - The CPU is in a
+  quiescent state."
+
+Also we setup MCIP debug mask according cpu possible mask.
+
+Signed-off-by: Eugeniy Paltsev <[email protected]>
+---
+ arch/arc/kernel/mcip.c | 10 ++++++++--
+ arch/arc/kernel/smp.c  | 30 ++++++++++++++++++++++++++----
+ 2 files changed, 34 insertions(+), 6 deletions(-)
+
+diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c
+index f61a52b..246481d 100644
+--- a/arch/arc/kernel/mcip.c
++++ b/arch/arc/kernel/mcip.c
+@@ -89,6 +89,8 @@ static void mcip_ipi_clear(int irq)
+ static void mcip_probe_n_setup(void)
+ {
+ 	struct mcip_bcr mp;
++	u32 mcip_mask = 0;
++	int i;
+ 
+ 	READ_BCR(ARC_REG_MCIP_BCR, mp);
+ 
+@@ -102,9 +104,13 @@ static void mcip_probe_n_setup(void)
+ 
+ 	cpuinfo_arc700[0].extn.gfrc = mp.gfrc;
+ 
++	for (i = 0; i < NR_CPUS; i++)
++		if (cpu_possible(i))
++			mcip_mask |= BIT(i);
++
+ 	if (mp.dbg) {
+-		__mcip_cmd_data(CMD_DEBUG_SET_SELECT, 0, 0xf);
+-		__mcip_cmd_data(CMD_DEBUG_SET_MASK, 0xf, 0xf);
++		__mcip_cmd_data(CMD_DEBUG_SET_SELECT, 0, mcip_mask);
++		__mcip_cmd_data(CMD_DEBUG_SET_MASK, 0xf, mcip_mask);
+ 	}
+ }
+ 
+diff --git a/arch/arc/kernel/smp.c b/arch/arc/kernel/smp.c
+index efe8b42..ee8b20a 100644
+--- a/arch/arc/kernel/smp.c
++++ b/arch/arc/kernel/smp.c
+@@ -24,6 +24,8 @@
+ #include <linux/reboot.h>
+ #include <linux/irqdomain.h>
+ #include <linux/export.h>
++#include <linux/of_fdt.h>
++#include <linux/libfdt.h>
+ 
+ #include <asm/processor.h>
+ #include <asm/setup.h>
+@@ -47,6 +49,29 @@ void __init smp_prepare_boot_cpu(void)
+ {
+ }
+ 
++/* Mark cpu as possible if cpu status is "okay" or status absents */
++void __init smp_init_cpumask(void)
++{
++	const struct fdt_property *prop;
++	char fdt_cpu_path[25];
++	unsigned int i, oft;
++
++	for (i = 0; i < NR_CPUS; i++) {
++		sprintf(fdt_cpu_path, "/cpus/cpu@%u", i);
++		oft = fdt_path_offset(initial_boot_params, fdt_cpu_path);
++		prop = fdt_get_property(initial_boot_params, oft, "status", NULL);
++
++		/* No status property == status OK */
++		if (!prop) {
++			set_cpu_possible(i, true);
++			continue;
++		}
++
++		if (!strcmp("okay", prop->data))
++			set_cpu_possible(i, true);
++	}
++}
++
+ /*
+  * Called from setup_arch() before calling setup_processor()
+  *
+@@ -58,10 +83,7 @@ void __init smp_prepare_boot_cpu(void)
+  */
+ void __init smp_init_cpus(void)
+ {
+-	unsigned int i;
+-
+-	for (i = 0; i < NR_CPUS; i++)
+-		set_cpu_possible(i, true);
++	smp_init_cpumask();
+ 
+ 	if (plat_smp_ops.init_early_smp)
+ 		plat_smp_ops.init_early_smp();
+-- 
+2.9.3
+

board/synopsys/hsdk/post-image.sh

@@ -6,7 +6,10 @@ GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
 GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
 rm -rf "${GENIMAGE_TMP}"
 
-mv ${BINARIES_DIR}/uboot-env.bin ${BINARIES_DIR}/uboot.env
+python3 ${BOARD_DIR}/headerise.py --arc-id 0x52 --image output/images/u-boot.bin --elf output/images/u-boot --env ${BOARD_DIR}/uboot.env.txt
+mkenvimage -s 0x4000 -o output/images/uboot.env ./u-boot-p-env.txt
+cp ./u-boot.head output/images
+rm u-boot.head u-boot-p-env.txt
 
 genimage                           \
         --rootpath "${TARGET_DIR}"     \

board/synopsys/hsdk/uboot-patches/0001-ARC-HSDK-Fixup-DW-SDIO-CIU-frequency-to-50000000Hz.patch

@@ -0,0 +1,59 @@
+From 0aa461be83200a1211d365c1c924bd94e1b5a0d6 Mon Sep 17 00:00:00 2001
+From: Eugeniy Paltsev <[email protected]>
+Date: Sat, 21 Oct 2017 15:02:44 +0300
+Subject: [PATCH 01/46] ARC: HSDK: Fixup DW SDIO CIU frequency to 50000000Hz
+
+DW sdio controller has external ciu clock devider controlled via
+register in SDIO IP. Due to its unexpected default value
+(it should devide by 1 but it devides by 8)
+SDIO IP uses wrong CIU clock (it should be 100000000Hz but actual
+is 12500000Hz) and works unstable (see STAR 9001204800)
+
+So increase SDIO CIU frequency from actual 12500000Hz to 50000000Hz
+by switching from the default divisor value (div-by-8) to the
+minimum possible value of the divisor (div-by-2) in HSDK platform
+code.
+
+Signed-off-by: Eugeniy Paltsev <[email protected]>
+---
+ board/synopsys/hsdk/hsdk.c | 12 +++++++++++-
+ 1 file changed, 11 insertions(+), 1 deletion(-)
+
+diff --git a/board/synopsys/hsdk/hsdk.c b/board/synopsys/hsdk/hsdk.c
+index 7b562556e6..7641978a7b 100644
+--- a/board/synopsys/hsdk/hsdk.c
++++ b/board/synopsys/hsdk/hsdk.c
+@@ -26,6 +26,10 @@ int board_early_init_f(void)
+ 	return 0;
+ }
+ 
++#define SDIO_BASE              (ARC_PERIPHERAL_BASE + 0xA000)
++#define SDIO_UHS_REG_EXT       (SDIO_BASE + 0x108)
++#define SDIO_UHS_REG_EXT_DIV_2 (2 << 30)
++
+ int board_mmc_init(bd_t *bis)
+ {
+ 	struct dwmci_host *host = NULL;
+@@ -36,12 +40,18 @@ int board_mmc_init(bd_t *bis)
+ 		return 1;
+ 	}
+ 
++	/*
++	 * Switch SDIO external ciu clock divider from default div-by-8 to
++	 * minimum possible div-by-2.
++	 */
++	writel(SDIO_UHS_REG_EXT_DIV_2, (void __iomem *) SDIO_UHS_REG_EXT);
++
+ 	memset(host, 0, sizeof(struct dwmci_host));
+ 	host->name = "Synopsys Mobile storage";
+ 	host->ioaddr = (void *)ARC_DWMMC_BASE;
+ 	host->buswidth = 4;
+ 	host->dev_index = 0;
+-	host->bus_hz = 100000000;
++	host->bus_hz = 50000000;
+ 
+ 	add_dwmci(host, host->bus_hz / 2, 400000);
+ 
+-- 
+2.11.0
+