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Lada Trimasova
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arc: axs10x - bump u-boot to 2016.03 release
Updating u-boot version to one of the latest stable versions. Add u-boot patch to fix verifying checksum problem with the latest bit-file: [U-Boot] arc/cache: really do flush_dcache_all() even if IOC exists, u-boot patch which adds virt_to_phys() stub for ARC: [U-Boot] arc: Add virt_to_phys() stub, u-boot patch which disables IOC in U-Boot: [PATCH] arc/cache: Disable IOC Signed-off-by: Lada Trimasova <[email protected]>
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‎boot/uboot/U-Boot-arc-Add-virt_to_phys-stub.patch‎

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From patchwork Fri Apr 8 17:00:07 2016
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [U-Boot] arc: Add virt_to_phys() stub
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From: Alexey Brodkin <[email protected]>
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X-Patchwork-Id: 608123
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Message-Id: <[email protected]>
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To: [email protected]
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Cc: Marek Vasut <[email protected]>, Alexey Brodkin <[email protected]>
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Date: Fri, 8 Apr 2016 10:00:07 -0700
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Commit cf7c93cdd755 "usb: ehci: Implement V2P mapping"
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introduced usage of virt_to_phys() in ehci-hcd.
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Since there was no implementation of virt_to_phys() for ARC
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compilation of the ehci-generic driver failed.
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This change adds virt_to_phys() stub for ARC so now
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USB driver for AXS101 board could be built again.
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Signed-off-by: Alexey Brodkin <[email protected]>
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Cc: Marek Vasut <[email protected]>
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Cc: Daniel Schwierzeck <[email protected]>
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Cc: Hans de Goede <[email protected]>
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Acked-by: Marek Vasut <[email protected]>
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---
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arch/arc/include/asm/io.h | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/arch/arc/include/asm/io.h b/arch/arc/include/asm/io.h
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index 281682c..b6f7724 100644
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--- a/arch/arc/include/asm/io.h
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+++ b/arch/arc/include/asm/io.h
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@@ -239,4 +239,9 @@ static inline int __raw_writesl(unsigned int addr, void *data, int longlen)
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#define setbits_8(addr, set) setbits(8, addr, set)
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#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
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+static inline phys_addr_t virt_to_phys(void *vaddr)
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+{
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+ return (phys_addr_t)((unsigned long)vaddr);
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+}
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+
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#endif /* __ASM_ARC_IO_H */

‎boot/uboot/U-Boot-arc-cache-Disable-IOC.patch‎

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From 9a6dd15b56b5bb005290d0e4f51e76d384b6c1e6 Mon Sep 17 00:00:00 2001
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From: Alexey Brodkin <[email protected]>
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Date: Mon, 25 Apr 2016 13:21:01 +0300
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Subject: [PATCH] arc/cache: Disable IOC
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As of today there's no way in U-Boot to distinguish
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cache operations on data being DMAed to or from memory
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and all those CPUs do them selves on memory.
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If IOC block was detected we disabled all cache operations
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and that was completely fine for data being transferred
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by means of DMA simply because IOC did its work and
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made sure data is coherent.
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But except DMA that changes memory in U-Boot
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we sometimes need to alter memory contents as well.
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And it applies not only to data but to instructions as well.
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These are 2 very good examples:
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1) U-Boot's self relocation
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2) Kick-start of slave cores in SMP systems
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In both above cases we modify code and if instructions
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caches of CPUs won't be updated until that new code gets
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pushed out of data cache of the core which made modification
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to either SLC or in external memory (if there's no SLC).
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So until there's a good and clean solution on cache management for
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2 separate cases (DMA and instructions) we'll disable IOC in U-Boot.
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Signed-off-by: Alexey Brodkin <[email protected]>
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---
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arch/arc/lib/cache.c | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
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index d1fb661..b52d7be 100644
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--- a/arch/arc/lib/cache.c
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+++ b/arch/arc/lib/cache.c
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@@ -148,7 +148,7 @@ static void read_decode_cache_bcr_arcv2(void)
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slc_exists = 1;
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slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64;
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}
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-
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+#if 0 /* Disable IOC due to inability to distinguish ops on DMA data and not */
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union {
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struct bcr_clust_cfg {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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@@ -163,6 +163,7 @@ static void read_decode_cache_bcr_arcv2(void)
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cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
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if (cbcr.fields.c)
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ioc_exists = 1;
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+#endif
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}
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#endif
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--
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2.5.0
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‎boot/uboot/U-Boot-arc-cache-really-do-flush_dcache_all-even-if-IOC-exists.patch‎

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From patchwork Mon Apr 18 10:28:39 2016
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [U-Boot] arc/cache: really do flush_dcache_all() even if IOC exists
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From: Alexey Brodkin <[email protected]>
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X-Patchwork-Id: 611647
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Message-Id: <[email protected]>
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To: [email protected]
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Cc: Alexey Brodkin <[email protected]>
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Date: Mon, 18 Apr 2016 13:28:39 +0300
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flush_dcache_all() is used in the very end of U-Boot self relocation
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to write back all copied and then patched code and data to their
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new location in the very end of available memory space.
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Since that has nothing to do with IO (i.e. no external DMA happens
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here) IOC won't help here and we need to write back data cache contents
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manually.
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Signed-off-by: Alexey Brodkin <[email protected]>
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---
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arch/arc/lib/cache.c | 7 ++-----
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1 file changed, 2 insertions(+), 5 deletions(-)
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diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
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index 56988dd..d1fb661 100644
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--- a/arch/arc/lib/cache.c
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+++ b/arch/arc/lib/cache.c
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@@ -430,13 +430,10 @@ void invalidate_dcache_all(void)
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void flush_dcache_all(void)
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{
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-#ifdef CONFIG_ISA_ARCV2
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- if (!ioc_exists)
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-#endif
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- __dc_entire_op(OP_FLUSH);
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+ __dc_entire_op(OP_FLUSH);
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#ifdef CONFIG_ISA_ARCV2
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- if (slc_exists && !ioc_exists)
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+ if (slc_exists)
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__slc_entire_op(OP_FLUSH);
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#endif
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}

‎configs/snps_axs101_defconfig‎

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BR2_TARGET_UBOOT=y
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BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
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BR2_TARGET_UBOOT_CUSTOM_VERSION=y
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BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2015.07"
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BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2016.03"
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BR2_TARGET_UBOOT_BOARD_DEFCONFIG="axs101"
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# Extra toolchain options for HS38 VDK release

‎configs/snps_axs103_defconfig‎

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BR2_TARGET_UBOOT=y
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BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
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BR2_TARGET_UBOOT_CUSTOM_VERSION=y
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BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2015.07"
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BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2016.03"
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BR2_TARGET_UBOOT_BOARD_DEFCONFIG="axs103"
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# Extra toolchain options for HS38 VDK release

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