4242 * ### Extra Required Peripherals
4343 *
4444 * ### Design Concept
45- * This example is designed to test secureshield runtime in embARC.
45+ * This example is designed to show how FreeRTOS is integrated with SecureShield.
46+ * Here, trap_s is used to trigger a task context switch request. So application
47+ * should not use trap exception.
48+ *
49+ * As container switch is not with task switch. So during a container call, task scheduler
50+ * should be suspended to avoid a task context.
4651 *
4752 * ### Usage Manual
4853 * Here we take EMSK 2.3 EM7D for example, you can run the program using Metaware toolset.
6772#include "embARC.h"
6873#include "embARC_debug.h"
6974
75+ #include "background_container.h"
7076#include "container1.h"
7177#include "container2.h"
7278
7379static void task1 (void * par );
7480static void task2 (void * par );
75- static void trap_exception (void * p_excinf );
76- static void soft_interrupt (void * p_excinf );
77-
78- #ifdef INTNO_I2C0
79- #define INTNO_SWI INTNO_I2C0
80- #else
81- #define INTNO_SWI 20
82- #endif
81+ static void interrupt_high_pri (void * p_excinf );
82+ static void interrupt_low_pri (void * p_excinf );
8383
8484/**
8585 * \var task1_handle
@@ -97,9 +97,8 @@ static TaskHandle_t task2_handle = NULL;
9797static volatile unsigned int start = 0 ;
9898static unsigned int perf_id = 0xFF ;
9999
100+ static unsigned int t_int_t2 ;
100101static unsigned int t_t2_t1 ;
101- static unsigned int t_int_t1 ;
102- static unsigned int t_t1_t2 ;
103102static unsigned int t_t1_int ;
104103static unsigned int t_int_nest ;
105104static unsigned int t_nest_int ;
@@ -165,13 +164,16 @@ int main(void)
165164 }
166165
167166
168- int_handler_install (INTNO_SWI , (EXC_HANDLER ) soft_interrupt );
169- int_pri_set (INTNO_SWI , INT_PRI_MIN );
170- int_enable (INTNO_SWI );
167+ int_handler_install (INTNO_LOW_PRI , (INT_HANDLER ) interrupt_low_pri );
168+ int_pri_set (INTNO_LOW_PRI , INT_PRI_MAX );
169+ int_enable (INTNO_LOW_PRI );
171170
172- exc_handler_install (EXC_NO_TRAP , trap_exception ); /*!< install the exception handler */
171+ int_handler_install (INTNO_HIGH_PRI , (INT_HANDLER )interrupt_high_pri );
172+ int_pri_set (INTNO_HIGH_PRI , INT_PRI_MIN );
173+ int_enable (INTNO_HIGH_PRI );
173174
174175
176+ vTaskSuspendAll ();
175177 if (xTaskCreate (task1 , "task1" , 256 , (void * )1 , configMAX_PRIORITIES - 2 , & task1_handle )
176178 != pdPASS ) { /*!< FreeRTOS xTaskCreate() API function */
177179 EMBARC_PRINTF ("create task1 error\r\n" );
@@ -182,8 +184,7 @@ int main(void)
182184 EMBARC_PRINTF ("create task2 error\r\n" );
183185 return -1 ;
184186 }
185-
186- vTaskSuspend (NULL );
187+ xTaskResumeAll ();
187188
188189 return 0 ;
189190}
@@ -196,26 +197,25 @@ int main(void)
196197 */
197198static void task1 (void * par )
198199{
199- TickType_t xLastExecutionTime ;
200- xLastExecutionTime = xTaskGetTickCount (); /*!< initialize current tick */
201- int i = 0 ;
202-
203200 while (1 ) {
204- t_t2_t1 = perf_end ();
205- vTaskDelayUntil ( & xLastExecutionTime , 500 ); /*!< This task should execute exactly every 1 second. */
206201 perf_start ();
207- _arc_aux_write (AUX_IRQ_HINT , INTNO_SWI ); /*!< activate soft_interrupt */
208- t_int_t1 = perf_end ();
202+ _arc_aux_write (AUX_IRQ_HINT , INTNO_LOW_PRI ); /*!< activate low priority interrupt */
203+ t_t2_t1 = perf_end ();
204+
205+ EMBARC_PRINTF ("The performance data is:\r\n" );
206+ EMBARC_PRINTF ("\ttask2->task1:%d cycles\r\n" ,t_t2_t1 );
207+ EMBARC_PRINTF ("\ttask1->int:%d cycles\r\n" , t_t1_int );
208+ EMBARC_PRINTF ("\tint->nest int:%d cycles\r\n" , t_int_nest );
209+ EMBARC_PRINTF ("\tnest int->int:%d cycles\r\n" , t_nest_int );
210+ EMBARC_PRINTF ("\tint->task2:%d cycles\r\n" , t_int_t2 );
211+ EMBARC_PRINTF ("\r\n" );
209212
210- EMBARC_PRINTF ("Rounds: %d\r\n" , i ++ );
211213 EMBARC_PRINTF ("Task1 is running and makes a container call...\r\n" );
212214 vTaskSuspendAll ();
213215 container_call (container2 , trusted_ops );
214216 xTaskResumeAll ();
215217
216- perf_start ();
217- vTaskResume (task2_handle );
218-
218+ vTaskDelay (500 );
219219 }
220220
221221}
@@ -227,14 +227,16 @@ static void task1(void * par)
227227 */
228228static void task2 (void * par )
229229{
230+ int i = 0 ;
230231 uint32_t ret = 0 ;
231232
232233 perf_init (TIMER_1 );
233234 while (1 ) {
234235 perf_start ();
235236 vTaskSuspend (NULL ); /*!< suspend task2 */
236- t_t1_t2 = perf_end ();
237+ t_int_t2 = perf_end ();
237238
239+ EMBARC_PRINTF ("\r\nRounds: %d\r\n" , i ++ );
238240 EMBARC_PRINTF ("\r\nTask2 is running and makes a container call...\r\n" );
239241 vTaskSuspendAll ();
240242 ret = container_call (container1 , operate_secret , "embarc" , GET_SECRET , public_data );
@@ -245,41 +247,35 @@ static void task2(void * par)
245247 EMBARC_PRINTF ("the secret is:%s\r\n" , public_data );
246248 memset (public_data , 0 , SECRET_LEN );
247249 }
248-
249- EMBARC_PRINTF ("The performance data is:\r\n" );
250- EMBARC_PRINTF ("\ttask2->task1:%d cycles\r\n" ,t_t2_t1 );
251- EMBARC_PRINTF ("\ttask1->int:%d cycles\r\n" , t_t1_int );
252- EMBARC_PRINTF ("\tint->nest int:%d cycles\r\n" , t_int_nest );
253- EMBARC_PRINTF ("\tnest int->int:%d cycles\r\n" , t_nest_int );
254- EMBARC_PRINTF ("\tint->task1:%d cycles\r\n" , t_int_t1 );
255- EMBARC_PRINTF ("\ttask1->task2:%d cycles\r\n" ,t_t1_t2 );
256- EMBARC_PRINTF ("\r\n" );
257250 }
258251}
259252
260253/**
261- * \brief trap exception
254+ * \brief high priority interrupt
262255 * \details Call xTaskResumeFromISR() to resume task2 that can be called from within ISR.
263256 * If resuming the task2 should result in a context switch, call vPortYieldFromIsr() to generate task switch request.
264257 * \param[in] *p_excinf
265258 */
266- static void trap_exception (void * p_excinf )
259+ static void interrupt_high_pri (void * p_excinf )
267260{
268261 // show exception frame
269262 t_int_nest = perf_end ();
263+ if (xTaskResumeFromISR (task2_handle ) == pdTRUE ) {
264+ portYIELD_FROM_ISR (); /* need to make task switch */
265+ }
270266 perf_start ();
271267}
272268
273269/**
274- * \brief soft interrupt
275- * \details Call trap_s instruction to raise the exception .
270+ * \brief low priority interrupt
271+ * \details write AUX_IRQ_HINT to raise higher priority interrtupt .
276272 * \param[in] *p_excinf
277273 */
278- static void soft_interrupt (void * p_exinf )
274+ static void interrupt_low_pri (void * p_exinf )
279275{
280276 t_t1_int = perf_end ();
281277 perf_start ();
282- Asm ( "trap_s 1" );
278+ _arc_aux_write ( AUX_IRQ_HINT , INTNO_HIGH_PRI ); /*!< activate high priority interrupt */
283279 t_nest_int = perf_end ();
284280 perf_start ();
285281}
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