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example: add spi slave example
use IoTDK board as SPI master and send data to EMSK as SPI Slave. The example shows how to use SPI driver with polling mode for both master and slave. Signed-off-by: Yuguo Zou <[email protected]>
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‎example/baremetal/spi_slave/README.rst‎

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.. _example_spi_slave:
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SPI_SLAVE
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#########
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Overview
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********
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This example shows SPI driver polling mode usage for both master and slave.
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Detailed Description
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====================
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* Extra Required Tools
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jumper wire
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* Extra Required Peripherals
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NO
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* Design Concept
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The master will transfer data to slave. Upon recieving, the slave will loopback the data.
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* Usage Manual
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This example requires one IoTDK board (as master) and one EMSK board (as slave)
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* Extra Comments
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NO
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Buidling and Running
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********************
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Use jumper wire to connect EMSK P1 lower row with IoTDK Pmod_B upper row. For pin map please refer to documents:
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`EMSK <https://foss-for-synopsys-dwc-arc-processors.github.io/embarc_osp/doc/build/html/board/emsk.html#pmod-pins-definition>`_
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`IoTDK <https://foss-for-synopsys-dwc-arc-processors.github.io/embarc_osp/doc/build/html/board/iotdk.html#extension-interfaces>`_
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.. note:: Make sure you have also connect GND of two boards with jumper wire
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With two different types of board connected to your computer, an extra command parameter ''DIG_NAME'' is needed to tell which board is which.
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Launch ''Digilent Adept'' which should have been installed along with board driver to get the ''DIG_NAME''. In our developing secnario, the ''DIG_NAME'' for EMSK is TE0604-03
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And the ''DIG_NAME'' for IoTDK is IoTDK. Please noted that the ''DIG_NAME'' may varies from board to board.
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*please run EMSK (SPI slave) program first*, tThe commands to run this example are as follows:
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.. code-block:: console
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$ cd <embarc_root>/example/baremetal/spi_slave
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$ make BOARD=emsk BD_VER=22 CUR_CORE=arcem9d DIG_NAME=TE0604-03 run
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If you do not have an EMSK development board, you can use the nSIM simulator
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which have been installed in MetaWare IDE.
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.. code-block:: console
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$ cd <embarc_root>/example/baremetal/spi_slave
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$ make BOARD=iotdk DIG_NAME=IoTDK run
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Sample Output
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=============
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The output from IoTDK (SPI master) are shown below
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.. code-block:: console
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-----------------------------------------------------------
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____ _ ____
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| _ \ _____ _____ _ __ ___ __| | __ ) _ _
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| |_) / _ \ \ /\ / / _ \ '__/ _ \/ _` | _ \| | | |
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| __/ (_) \ V V / __/ | | __/ (_| | |_) | |_| |
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|_| \___/ \_/\_/ \___|_| \___|\__,_|____/ \__, |
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|___/
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_ _ ____ ____
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___ _ __ ___ | |__ / \ | _ \ / ___|
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/ _ \ '_ ` _ \| '_ \ / _ \ | |_) | |
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| __/ | | | | | |_) / ___ \| _ <| |___
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\___|_| |_| |_|_.__/_/ \_\_| \_\\____|
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------------------------------------------------------------
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embARC Build Time: Oct 13 2021, 10:35:16
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Compiler Version: Metaware, Clang 11.1.0
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PI Master & Slave test Oct 13 2021 / 14:42:48
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IoTDK Pmod B upper row is working as SPI Master
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SPI Master is successfully opened
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SPI Master Buffer
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TX: 0x0 0x0 0x0 0x0
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RX: 0x0 0x0 0x0 0x0
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SPI Master Buffer
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TX: 0x1 0x1 0x1 0x1
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RX: 0x0 0x0 0x0 0x0
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SPI Master Buffer
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TX: 0x2 0x2 0x2 0x2
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RX: 0x1 0x1 0x1 0x1
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SPI Master Buffer
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TX: 0x3 0x3 0x3 0x3
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RX: 0x2 0x2 0x2 0x2
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SPI Master Buffer
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TX: 0x4 0x4 0x4 0x4
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RX: 0x3 0x3 0x3 0x3
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SPI Master Buffer
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TX: 0x5 0x5 0x5 0x5
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RX: 0x4 0x4 0x4 0x4
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SPI Master Buffer
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TX: 0x6 0x6 0x6 0x6
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RX: 0x5 0x5 0x5 0x5
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.................
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The output from EMSK (SPI slave) are shown below
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.. code-block:: console
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-----------------------------------------------------------
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____ _ ____
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| _ \ _____ _____ _ __ ___ __| | __ ) _ _
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| |_) / _ \ \ /\ / / _ \ '__/ _ \/ _` | _ \| | | |
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| __/ (_) \ V V / __/ | | __/ (_| | |_) | |_| |
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|_| \___/ \_/\_/ \___|_| \___|\__,_|____/ \__, |
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|___/
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_ _ ____ ____
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___ _ __ ___ | |__ / \ | _ \ / ___|
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/ _ \ '_ ` _ \| '_ \ / _ \ | |_) | |
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| __/ | | | | | |_) / ___ \| _ <| |___
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\___|_| |_| |_|_.__/_/ \_\_| \_\\____|
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------------------------------------------------------------
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embARC Build Time: Oct 11 2021, 10:12:43
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Compiler Version: Metaware, Clang 11.1.0
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SPI Master & Slave test Oct 13 2021 / 14:42:47
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EMSK Pmod 1 (J1) lower row is working as SPI Slave
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SPI Slave is successfully opened
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SPI Slave Buffer
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TX: 0x0 0x0 0x0 0x0
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RX: 0x0 0x0 0x0 0x0
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SPI Slave Buffer
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TX: 0x0 0x0 0x0 0x0
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RX: 0x1 0x1 0x1 0x1
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SPI Slave Buffer
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TX: 0x1 0x1 0x1 0x1
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RX: 0x2 0x2 0x2 0x2
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SPI Slave Buffer
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TX: 0x2 0x2 0x2 0x2
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RX: 0x3 0x3 0x3 0x3
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SPI Slave Buffer
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TX: 0x3 0x3 0x3 0x3
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RX: 0x4 0x4 0x4 0x4
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SPI Slave Buffer
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TX: 0x4 0x4 0x4 0x4
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RX: 0x5 0x5 0x5 0x5
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SPI Slave Buffer
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TX: 0x5 0x5 0x5 0x5
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RX: 0x6 0x6 0x6 0x6
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.................

‎example/baremetal/spi_slave/main.c‎

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/* ------------------------------------------
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* Copyright (c) 2021, Synopsys, Inc. All rights reserved.
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1) Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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* 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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--------------------------------------------- */
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#include "embARC.h"
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#include "embARC_debug.h"
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#define BUFFER_SIZE 4
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void printbuffer(uint8_t *tx, uint8_t *rx)
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{
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#ifdef BOARD_EMSK
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EMBARC_PRINTF("SPI Slave Buffer\n");
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#elif defined BOARD_IOTDK
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EMBARC_PRINTF("SPI Master Buffer\n");
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#endif
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EMBARC_PRINTF("TX:");
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for(uint8_t i = 0; i < BUFFER_SIZE; i++){
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EMBARC_PRINTF(" 0x%x", tx[i]);
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}
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EMBARC_PRINTF("\nRX:");
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for(uint8_t i = 0; i < BUFFER_SIZE; i++){
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EMBARC_PRINTF(" 0x%x", rx[i]);
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}
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EMBARC_PRINTF("\n");
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return;
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}
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/* Please run EMSK (SPI Slave) first */
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int main(void)
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{
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unsigned int ercd = 0;
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EMBARC_PRINTF("SPI Master & Slave test " __DATE__ " / " __TIME__ " \n");
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#ifdef BOARD_EMSK
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EMBARC_PRINTF("EMSK Pmod 1 (J1) lower row is working as SPI Slave\n");
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DEV_SPI_PTR pSpiSlave = spi_get_dev(DW_SPI_1_ID);
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ercd = pSpiSlave->spi_open(DEV_SLAVE_MODE, SPI_CLK_MODE_0);
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if ((ercd == E_OPNED) || (ercd == E_OK)) {
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EMBARC_PRINTF("SPI Slave is successfully opened\n");
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} else {
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EMBARC_PRINTF("SPI Slave is unable to open: error=%d\nEnd of Test\n", ercd);
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return E_SYS;
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}
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DEV_SPI_TRANSFER spi_s_xfer;
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uint8_t spi_s_buffer_tx[BUFFER_SIZE]={0};
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uint8_t spi_s_buffer_rx[BUFFER_SIZE]={0};
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DEV_SPI_XFER_SET_TXBUF(&spi_s_xfer, spi_s_buffer_tx, 0, BUFFER_SIZE);
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DEV_SPI_XFER_SET_RXBUF(&spi_s_xfer, spi_s_buffer_rx, 0, BUFFER_SIZE);
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DEV_SPI_XFER_SET_NEXT(&spi_s_xfer, NULL);
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while (1) {
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ercd = pSpiSlave->spi_control(SPI_CMD_TRANSFER_POLLING, CONV2VOID(&spi_s_xfer));
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printbuffer(spi_s_buffer_tx, spi_s_buffer_rx);
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// loop back the data
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for(uint8_t i = 0; i < BUFFER_SIZE; i++){
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spi_s_buffer_tx[i] = spi_s_buffer_rx[i];
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}
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board_delay_ms(500, 1);
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}
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#elif defined BOARD_IOTDK
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EMBARC_PRINTF("IoTDK Pmod B upper row is working as SPI Master\n");
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DEV_SPI_PTR pSpiMaster = spi_get_dev(DFSS_SPI_1_ID);
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ercd = pSpiMaster->spi_open(DEV_MASTER_MODE, 1000000);
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if ((ercd == E_OPNED) || (ercd == E_OK)) {
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EMBARC_PRINTF("SPI Master is successfully opened\n");
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ercd = pSpiMaster->spi_control(SPI_CMD_SET_CLK_MODE, CONV2VOID(SPI_CLK_MODE_0));
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} else {
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EMBARC_PRINTF("SPI Master is unable to open: error=%d\nEnd of Test\n", ercd);
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return E_SYS;
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}
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DEV_SPI_TRANSFER spi_m_xfer;
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uint8_t spi_m_buffer_tx[BUFFER_SIZE]={0};
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uint8_t spi_m_buffer_rx[BUFFER_SIZE]={0};
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DEV_SPI_XFER_SET_TXBUF(&spi_m_xfer, spi_m_buffer_tx, 0, BUFFER_SIZE);
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DEV_SPI_XFER_SET_RXBUF(&spi_m_xfer, spi_m_buffer_rx, 0, BUFFER_SIZE);
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DEV_SPI_XFER_SET_NEXT(&spi_m_xfer, NULL);
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while (1) {
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ercd = pSpiMaster->spi_control(SPI_CMD_MST_SEL_DEV, CONV2VOID(0));
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ercd = pSpiMaster->spi_control(SPI_CMD_TRANSFER_POLLING, CONV2VOID(&spi_m_xfer));
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ercd = pSpiMaster->spi_control(SPI_CMD_MST_DSEL_DEV, CONV2VOID(0));
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printbuffer(spi_m_buffer_tx, spi_m_buffer_rx);
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for(uint8_t i = 0; i < BUFFER_SIZE; i++){
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spi_m_buffer_tx[i]++;
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}
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board_delay_ms(3000, 1);
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}
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#else
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EMBARC_PRINTF("This example is not supported under current configurations \r\n");
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#endif
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return E_SYS;
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}

‎example/baremetal/spi_slave/makefile‎

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# Application name
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APPL ?= spi_slave
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#
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# root dir of embARC
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#
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EMBARC_ROOT = ../../..
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MID_SEL = common
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# application source dirs
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APPL_CSRC_DIR = .
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APPL_ASMSRC_DIR = .
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# application include dirs
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APPL_INC_DIR = .
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# include current project makefile
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COMMON_COMPILE_PREREQUISITES += makefile
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### Options above must be added before include options.mk ###
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# include key embARC build system makefile
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include $(EMBARC_ROOT)/options/options.mk

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