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1 parent e5c1cc7 commit 1d9f2b3Copy full SHA for 1d9f2b3
gcc/doc/invoke.texi
@@ -11246,6 +11246,13 @@ Enables support for double precision floating point hardware
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extensions. The single precision floating point extension is also
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enabled@.
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+@item fpuda
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+@opindex fpuda
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+Enables support for double precision floating point hardware
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+extensions using double precision assist instructions. The single
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+precision floating point extension is also enabled. This option is
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+only available for ARC EM@.
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+
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@item fpus_div
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@opindex fpus_div
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Enables support for single precision floating point, and single
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