Control if an atomic instruction bypasses the chache or not

Author: Claudiu Zissulescu

gcc/ChangeLog.ARC

@@ -1,3 +1,9 @@
+2013-05-28 Claudiu Zissulescu <[email protected]>
+
+	* config/arc/arc.c (%+):New punctuation character.
+	* config/arc/arc.opt (mbypass-cache): New option.
+	* config/arc/atomic.md: Use %+ punctuation character.
+
 2013-05-27 Claudiu Zissulescu <[email protected]>
 
 	* config/arc/arc.md (simple_return): Use RETI when returning

gcc/config/arc/arc.c

@@ -864,6 +864,7 @@ arc_init (void)
   arc_punct_chars['!'] = 1;
   arc_punct_chars['^'] = 1;
   arc_punct_chars['&'] = 1;
+  arc_punct_chars['+'] = 1;
 
   /* There are two target-independent ifcvt passes, and arc_reorg may do
      one ore more arc_ifcvt calls.  */
@@ -3300,6 +3301,11 @@ arc_print_operand (FILE *file, rtx x, int code)
       else
 	output_operand_lossage ("invalid operand to %%U code");
       return;
+    case '+':
+      /* Output cache bypass indicator for atomic instructions. */
+      if (TARGET_BYPASS_CACHE)
+	fputs (".di", file);
+      return;
     case 'V' :
       /* Output cache bypass indicator for a load/store insn.  Volatile memory
 	 refs are defined to use the cache bypass mechanism.  */

gcc/config/arc/arc.opt

@@ -472,3 +472,6 @@ Target Joined
 mmac_
 Target Joined
 
+mbypass-cache
+Target Report Mask(BYPASS_CACHE)
+Controls the .di instruction extension of atomic instructions. When enabled, the atomic operations operates directly on external memory.

gcc/config/arc/atomic.md

@@ -111,7 +111,7 @@
 	  [(match_operand:SI 1 "mem_noofs_operand" "ATO")]
 	  VUNSPEC_LL))]
   "TARGET_ATOMIC"
-  "llock.di %0,%1"
+  "llock%+ %0,%1"
   [(set_attr "type" "load")
    (set_attr "iscompact" "false")
    (set_attr "predicable" "no")
@@ -123,7 +123,7 @@
 			   VUNSPEC_SC))
    (clobber (reg:CC_Z CC_REG))]
   "TARGET_ATOMIC"
-  "scond.di %1,%0"
+  "scond%+ %1,%0"
   [(set_attr "type" "store")
    (set_attr "iscompact" "false")
    (set_attr "predicable" "no")
@@ -151,7 +151,7 @@
    (set (match_dup 1)
 	(match_operand:SI 2 "register_operand" "0"))]
   ""
-  "ex.di %0,%1"
+  "ex%+ %0,%1"
   [(set_attr "type" "load")
    (set_attr "iscompact" "false")
    (set_attr "predicable" "no")