Skip to content

Commit c105a4e

Browse files
author
Claudiu Zissulescu
committed
Merge remote branch 'origin/arc-4.8-dev' into arc-4.8.2-dev
2 parents 5a424f3 + ba53d41 commit c105a4e

File tree

14 files changed

+845
-294
lines changed

14 files changed

+845
-294
lines changed

‎gcc/ChangeLog.ARC‎

Lines changed: 92 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,95 @@
1+
2013-07-15 Claudiu Zissulescu <[email protected]>
2+
3+
* config/arc/arc.md (EXPAND mulsidi3): Use separate
4+
instructions when dealing with immediates, HS only.
5+
(EXPAND umulsidi3): Likewise.
6+
(mpyd_imm_arcv2hs): New pattern.
7+
(mpydu_imm_arcv2hs): Likewise.
8+
9+
2013-06-30 Claudiu Zissulescu <[email protected]>
10+
11+
* config/arc/arc.h (DRIVER_SELF_SPECS): Add new mcpu options.
12+
* config/arc/arc.opt: Likewise.
13+
14+
2013-06-27 Claudiu Zissulescu <[email protected]>
15+
16+
* common/config/arc/arc-common.c: Atomic option set default on for HS.
17+
* config.gcc: Add arcem. archs configuration variants.
18+
* config/arc/arc.h: Translate marc600, macr601, marcem, and marchs options.
19+
* config/arc/arc.opt: Add marc600, macr601, marcem, and marchs options.
20+
21+
2013-06-26 Claudiu Zissulescu <[email protected]>
22+
23+
* config/arc/arc.h (ASM_DEFOPT): Define.
24+
(ASM_SPEC): Use it.
25+
26+
2013-06-25 Claudiu Zissulescu <[email protected]>
27+
28+
* config/arc/arc.c: Add -mirq-ctrl-saved option.
29+
* config/arc/arc.md: Likewise
30+
* config/arc/arc.opt: Likewise
31+
* doc/invoke.texi: Likewise
32+
* config/arc/t-arc-newlib (MULTILIB_REUSE): Define.
33+
34+
2013-06-18 Claudiu Zissulescu <[email protected]>
35+
36+
* doc/extend.texi: Update __builtin_arc_sr description.
37+
* doc/invoke.texi: Update mmul32x16 description.
38+
39+
2013-05-28 Claudiu Zissulescu <[email protected]>
40+
41+
* config/arc/arc.c (%+):New punctuation character.
42+
* config/arc/arc.opt (mbypass-cache): New option.
43+
* config/arc/atomic.md: Use %+ punctuation character.
44+
45+
2013-05-27 Claudiu Zissulescu <[email protected]>
46+
47+
* config/arc/arc.md (simple_return): Use RETI when returning
48+
from an interrupt. Valid only for ARCv2.
49+
50+
2013-05-22 Claudiu Zissulescu <[email protected]>
51+
52+
* config/arc/arc.c (arc_conditional_register_usage): Make sure
53+
r30 is fix for the time being.
54+
* config/arc/arc.h (AC16_H_REGS): New Register class.
55+
* config/arc/arc.md :Use 'h' instead of 'W' for 5bit register
56+
class.
57+
* config/arc/constraints.md ('h'): New register constraint letter.
58+
59+
2013-05-16 Claudiu Zissulescu <[email protected]>
60+
61+
* config/arc/arc.c (arc_expand_movmem): Fix computation on
62+
n_pieces.
63+
* config/arc/arc.md (addsi3_mixed): Fix attribute.
64+
65+
2013-05-16 Claudiu Zissulescu <[email protected]>
66+
67+
* config/arc/arc.c (arc_expand_movmem): Use double load/store
68+
operations.
69+
70+
2013-05-13 Claudiu Zissulescu <[email protected]>
71+
72+
* config/arc/arc-opts.h (FPX_DP): Define.
73+
* config/arc/arc.c (arc_init): Allow use of double precision
74+
assist instructions by EM cpu family.
75+
* config/arc/arc.h (__Xfpuda): Define when -mfpu=fpuda is used.
76+
(ASM_SPEC): Pass -mfpuda option to assembler.
77+
* config/arc/arc.md (subdf3): Fix needed by EM as reverse sub
78+
double precision operations are not available.
79+
* config/arc/arc.opt (fpuda): New option.
80+
* config/arc/fpx.md: Clean up and filter out use of drsubh
81+
instructions for EM.
82+
83+
2013-05-09 Claudiu Zissulescu <[email protected]>
84+
85+
* config/arc/arc.c (arc_init): Allow FPU single precission to
86+
be used for EM.
87+
* config/arc/arc.h (TARGET_CPU_CPP_BUILTINS): Define
88+
_CPU_DEFAULT_A6, _CPU_DEFAULT_A7, _CPU_DEFAULT_EM,
89+
_CPU_DEFAULT_HS.
90+
* config/arc/arc.md (mulsi3_v2): Allow commutative operand.
91+
* config/arc/arc.opt: Option documentation updated.
92+
193
2013-04-07 Claudiu Zissulescu <[email protected]>
294

395
* config/arc/predicates.md (mult_operator): Update.

‎gcc/common/config/arc/arc-common.c‎

Lines changed: 13 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -94,6 +94,8 @@ arc_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
9494
opts->x_target_flags |= MASK_NORM_SET; /* Default: on. */
9595
if ( !(opts_set->x_target_flags & MASK_SWAP_SET))
9696
opts->x_target_flags &= ~MASK_SWAP_SET; /* Default: off. */
97+
if ( !(opts_set->x_target_flags & MASK_ATOMIC))
98+
opts->x_target_flags &= ~MASK_ATOMIC; /* Default: off */
9799
/* For ARC700, mpy16 makes no sense. */
98100
opts->x_target_flags &= ~MASK_MPY16_SET;
99101
opts->x_target_flags &= ~MASK_CODE_DENSITY;
@@ -111,6 +113,7 @@ arc_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
111113
opts->x_target_flags &= ~MASK_MPY_SET;
112114
opts->x_target_flags &= ~MASK_CODE_DENSITY;
113115
opts->x_target_flags &= ~MASK_SHIFT_ASSIST;
116+
opts->x_target_flags &= ~MASK_ATOMIC;
114117
break;
115118

116119
case PROCESSOR_ARCv2HS:
@@ -131,6 +134,8 @@ arc_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
131134
opts->x_target_flags |= MASK_NORM_SET; /* Default: on. */
132135
if ( !(opts_set->x_target_flags & MASK_SWAP_SET))
133136
opts->x_target_flags |= MASK_SWAP_SET; /* Default: on. */
137+
if ( !(opts_set->x_target_flags & MASK_ATOMIC))
138+
opts->x_target_flags |= MASK_ATOMIC; /* Default: on. */
134139
break;
135140

136141
case PROCESSOR_ARCv2EM:
@@ -151,6 +156,8 @@ arc_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
151156
opts->x_target_flags &= ~MASK_NORM_SET; /* Default: off. */
152157
if ( !(opts_set->x_target_flags & MASK_SWAP_SET))
153158
opts->x_target_flags &= ~MASK_SWAP_SET; /* Default: off. */
159+
if ( !(opts_set->x_target_flags & MASK_ATOMIC))
160+
opts->x_target_flags &= ~MASK_ATOMIC; /* Default: off */
154161
break;
155162

156163
case PROCESSOR_ARC601:
@@ -164,6 +171,7 @@ arc_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
164171
opts->x_target_flags &= ~MASK_MPY_SET;
165172
opts->x_target_flags &= ~MASK_CODE_DENSITY;
166173
opts->x_target_flags &= ~MASK_SHIFT_ASSIST;
174+
opts->x_target_flags &= ~MASK_ATOMIC;
167175
break;
168176

169177
default:
@@ -216,17 +224,17 @@ arc_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
216224

217225
#if TARGET_CPU_DEFAULT == TARGET_CPU_HS
218226
/* For HS max out. */
219-
#define TARGET_DEFAULT_TARGET_FLAGS \
220-
(MASK_BARREL_SHIFTER | MASK_VOLATILE_CACHE_SET | DEFAULT_NO_SDATA \
227+
# define TARGET_DEFAULT_TARGET_FLAGS \
228+
(MASK_BARREL_SHIFTER | MASK_VOLATILE_CACHE_SET | DEFAULT_NO_SDATA \
221229
| MASK_MPY_SET | MASK_MPY16_SET | MASK_SHIFT_ASSIST | MASK_CODE_DENSITY \
222-
| MASK_NORM_SET | MASK_SWAP_SET)
230+
| MASK_NORM_SET | MASK_SWAP_SET | MASK_ATOMIC)
223231
#elif TARGET_CPU_DEFAULT == TARGET_CPU_EM
224232
/* Default for EM: no barrel shifter*/
225-
#define TARGET_DEFAULT_TARGET_FLAGS \
233+
# define TARGET_DEFAULT_TARGET_FLAGS \
226234
(MASK_BARREL_SHIFTER | MASK_VOLATILE_CACHE_SET | DEFAULT_NO_SDATA | MASK_MPY_SET | MASK_MPY16_SET)
227235
#else
228236
/* We default to ARC700, which has the barrel shifter enabled. */
229-
#define TARGET_DEFAULT_TARGET_FLAGS \
237+
# define TARGET_DEFAULT_TARGET_FLAGS \
230238
(MASK_BARREL_SHIFTER | MASK_VOLATILE_CACHE_SET | DEFAULT_NO_SDATA | MASK_MPY_SET)
231239
#endif
232240

‎gcc/config.gcc‎

Lines changed: 13 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -871,6 +871,12 @@ arc*-*-elf*)
871871
xarc600|xarc601|xarc700|xEM|xHS)
872872
target_cpu_default="TARGET_CPU_$with_cpu"
873873
;;
874+
xarcem)
875+
target_cpu_default="TARGET_CPU_EM"
876+
;;
877+
xarchs)
878+
target_cpu_default="TARGET_CPU_HS"
879+
;;
874880
esac
875881
if test x${with_endian} = x; then
876882
case ${target} in
@@ -896,6 +902,12 @@ arc*-*-linux-uclibc*)
896902
xarc600|xarc601|xarc700|xEM|xHS)
897903
target_cpu_default="TARGET_CPU_$with_cpu"
898904
;;
905+
xarcem)
906+
target_cpu_default="TARGET_CPU_EM"
907+
;;
908+
xarchs)
909+
target_cpu_default="TARGET_CPU_HS"
910+
;;
899911
esac
900912
if test x${with_endian} = x; then
901913
case ${target} in
@@ -3250,7 +3262,7 @@ case "${target}" in
32503262
arc*-*-*) # was: arc*-*-linux-uclibc)
32513263
supported_defaults="cpu"
32523264
case $with_cpu in
3253-
arc600|arc601|arc700|EM|HS)
3265+
arc600|arc601|arc700|EM|HS|arcem|archs)
32543266
;;
32553267
*) echo "Unknown cpu type"
32563268
exit 1

‎gcc/config/arc/arc-opts.h‎

Lines changed: 10 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -28,11 +28,13 @@ enum processor_type
2828
PROCESSOR_ARCv2HS
2929
};
3030

31-
#define FPU_SP 0x01 /* Single precision floating point. */
32-
#define FPU_SF 0x02 /* Single precision fused floating point operations. */
33-
#define FPU_SC 0x04 /* Single precision floating point format conversion operations. */
34-
#define FPU_SD 0x08 /* Single precision floating point sqrt and div operations. */
35-
#define FPU_DP 0x10 /* Double precision floating point. */
36-
#define FPU_DF 0x20 /* Double precision fused floating point operations. */
37-
#define FPU_DC 0x40 /* Double precision floating point format conversion operations. */
38-
#define FPU_DD 0x80 /* Double precision floating point sqrt and div operations. */
31+
#define FPU_SP 0x0001 /* Single precision floating point. */
32+
#define FPU_SF 0x0002 /* Single precision fused floating point operations. */
33+
#define FPU_SC 0x0004 /* Single precision floating point format conversion operations. */
34+
#define FPU_SD 0x0008 /* Single precision floating point sqrt and div operations. */
35+
#define FPU_DP 0x0010 /* Double precision floating point. */
36+
#define FPU_DF 0x0020 /* Double precision fused floating point operations. */
37+
#define FPU_DC 0x0040 /* Double precision floating point format conversion operations. */
38+
#define FPU_DD 0x0080 /* Double precision floating point sqrt and div operations. */
39+
40+
#define FPX_DP 0x0100 /* Double precision floating point assist operations. */

0 commit comments

Comments
 (0)