add indirect CSR listing, addresses issue riscv#2127 (riscv#2139)

* add indirect CSR listing, addresses issue riscv#2127

* fix trailing whitespace

Author: bcstrongx

src/priv-csrs.adoc

@@ -1042,6 +1042,84 @@ Debug scratch register 0. +
 Debug scratch register 1.
 |===
 
+[[indcsrs-m]]
+.Currently allocated RISC-V indirect CSR (Smcsrind) mappings - M-mode
+[float="center",align="center",options="header"]
+|===
+| `miselect`  | `mireg`  | `mireg2`  | `mireg3`  | `mireg4`  | `mireg5`  | `mireg6`
+| 0x30 | `iprio0` | none | none | none | none | none
+| ... | ... | ... | ... | ... | ... | ...
+| 0x3F | `iprio15` | none | none | none | none | none
+| 0x70 | `eidelivery` | none | none | none | none | none
+| 0x71 | 0 | none | none | none | none | none
+| 0x72 | `eithreshold` | none | none | none | none | none
+| 0x73 | 0 | none | none | none | none | none
+| ... | ... | ... | ... | ... | ... | ...
+| 0x7F | 0 | none | none | none | none | none
+| 0x80 | `eip0` | none | none | none | none | none
+| ... | ... | ... | ... | ... | ... | ...
+| 0xBF | `eip63` | none | none | none | none | none
+| 0xC0 | `eie0` | none | none | none | none | none
+| ... | ... | ... | ... | ... | ... | ...
+| 0xFF | `eie63` | none | none | none | none | none
+|===
+
+[[indcsrs-s]]
+.Currently allocated RISC-V indirect CSR (Smcsrind/Sscsrind) mappings - S-mode
+[float="center",align="center",options="header"]
+|===
+| `siselect`  | `sireg`  | `sireg2`  | `sireg3`  | `sireg4`  | `sireg5`  | `sireg6`
+| 0x30 | `iprio0` | none | none | none | none | none
+| ... | ... | ... | ... | ... | ... | ...
+| 0x3F | `iprio15` | none | none | none | none | none
+| 0x40 | `cycle` | `cyclecfg` | none | `cycleh` | `cyclecfgh` | none
+| 0x41 | none | none | none | none | none | none
+| 0x42 | `instret` | `instretcfg` | none | `instreth` | `instretcfgh` | none
+| 0x43 | `hpmcounter3` | `hpmevent3` | none | `hpmcounter3h` | `hpmevent3h` | none
+| ... | ... | ... | ... | ... | ... | ...
+| 0x5F | `hpmcounter31` | `hpmevent31` | none | `hpmcounter31h` | `hpmevent31h` | none
+| 0x70 | `eidelivery` | none | none | none | none | none
+| 0x71 | 0 | none | none | none | none | none
+| 0x72 | `eithreshold` | none | none | none | none | none
+| 0x73 | 0 | none | none | none | none | none
+| ... | ... | ... | ... | ... | ... | ...
+| 0x7F | 0 | none | none | none | none | none
+| 0x80 | `eip0` | none | none | none | none | none
+| ... | ... | ... | ... | ... | ... | ...
+| 0xBF | `eip63` | none | none | none | none | none
+| 0xC0 | `eie0` | none | none | none | none | none
+| ... | ... | ... | ... | ... | ... | ...
+| 0xFF | `eie63` | none | none | none | none | none
+| 0x200 | `ctrsource0` | `ctrtarget0` | `ctrdata0` | 0 | 0 | 0
+| ... | ... | ... | ... | ... | ... | ...
+| 0x2FF | `ctrsource255` | `ctrtarget255` | `ctrdata255` | 0 | 0 | 0
+|===
+
+[[indcsrs-vs]]
+.Currently allocated RISC-V indirect CSR (Smcsrind/Sscsrind) mappings - VS-mode
+[float="center",align="center",options="header"]
+|===
+| `vsiselect`  | `vsireg`  | `vsireg2`  | `vsireg3`  | `vsireg4`  | `vsireg5`  | `vsireg6`
+| 0x30 | `iprio0` | none | none | none | none | none
+| ... | ... | ... | ... | ... | ... | ...
+| 0x3F | `iprio15` | none | none | none | none | none
+| 0x70 | `eidelivery` | none | none | none | none | none
+| 0x71 | 0 | none | none | none | none | none
+| 0x72 | `eithreshold` | none | none | none | none | none
+| 0x73 | 0 | none | none | none | none | none
+| ... | ... | ... | ... | ... | ... | ...
+| 0x7F | 0 | none | none | none | none | none
+| 0x80 | `eip0` | none | none | none | none | none
+| ... | ... | ... | ... | ... | ... | ...
+| 0xBF | `eip63` | none | none | none | none | none
+| 0xC0 | `eie0` | none | none | none | none | none
+| ... | ... | ... | ... | ... | ... | ...
+| 0xFF | `eie63` | none | none | none | none | none
+| 0x200 | `ctrsource0` | `ctrtarget0` | `ctrdata0` | 0 | 0 | 0
+| ... | ... | ... | ... | ... | ... | ...
+| 0x2FF | `ctrsource255` | `ctrtarget255` | `ctrdata255` | 0 | 0 | 0
+|===
+
 === CSR Field Specifications
 
 The following definitions and abbreviations are used in specifying the