Fix trailing whitespace and line endings

Using `pre-commit run --all-files`

Author: arichardson

LICENSE

@@ -49,7 +49,7 @@ exhaustive, and do not form part of our licenses.
      such as asking that all changes be marked or described.
      Although not required by our licenses, you are encouraged to
      respect those requests where reasonable. More_considerations
-     for the public: 
+     for the public:
 	wiki.creativecommons.org/Considerations_for_licensees
 
 =======================================================================
@@ -393,4 +393,3 @@ the avoidance of doubt, this paragraph does not form part of the
 public licenses.
 
 Creative Commons may be contacted at creativecommons.org.
-

dependencies/README.md

@@ -1,3 +1,2 @@
 Dependencies for the build environment for various package managers.  Used in
 `.github/workflows/`.
-

marchid.md

@@ -16,22 +16,22 @@ requests against this repository to request the allocation of an architecture
 ID.
 
 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-Project Name  | Maintainers                     | Point of Contact                                            | Architecture ID   | Project URL                                         
-------------- | ------------------------------- | ----------------------------------------------------------- | ----------------- | --------------------------------------------------- 
+Project Name  | Maintainers                     | Point of Contact                                            | Architecture ID   | Project URL  
+------------- | ------------------------------- | ----------------------------------------------------------- | ----------------- | ---------------------------------------------------
 Rocket        | SiFive, UC Berkeley             | [Andrew Waterman](mailto:[email protected]), SiFive         | 1                 | https://github.com/chipsalliance/rocket-chip
 BOOM          | UC Berkeley                     | [Christopher Celio](mailto:[email protected])              | 2                 | https://github.com/riscv-boom/riscv-boom
-CVA6          | OpenHW Group                    | [Florian Zaruba](mailto:[email protected]), OpenHW Group | 3                 | https://github.com/openhwgroup/cva6             
+CVA6          | OpenHW Group                    | [Florian Zaruba](mailto:[email protected]), OpenHW Group | 3                 | https://github.com/openhwgroup/cva6  
 CV32E40P      | OpenHW Group                    | [Davide Schiavone](mailto:[email protected]), OpenHW Group | 4                 | https://github.com/openhwgroup/cv32e40p
-Spike         | SiFive, UC Berkeley             | [Andrew Waterman](mailto:[email protected]), SiFive         | 5                 | https://github.com/riscv/riscv-isa-sim              
+Spike         | SiFive, UC Berkeley             | [Andrew Waterman](mailto:[email protected]), SiFive         | 5                 | https://github.com/riscv/riscv-isa-sim  
 E-Class       | IIT Madras                      | [Neel Gala](mailto:[email protected])                      | 6                 | https://gitlab.com/shaktiproject/cores/e-class
 ORCA          | VectorBlox                      | [Joel Vandergriendt](mailto:[email protected])            | 7                 | https://github.com/vectorblox/orca
 SCR1          | Syntacore                       | [Dmitri Pavlov](mailto:[email protected]), Syntacore| 8               | https://github.com/syntacore/scr1
 YARVI         | Tommy Thorn's Priceless Services| [Tommy Thorn](mailto:[email protected])                | 9                 | https://github.com/tommythorn/yarvi
 RVBS          | Alexandre Joannou, University of Cambridge| [Alexandre Joannou](mailto:[email protected])    | 10                | https://github.com/CTSRD-CHERI/RVBS
 SweRV EH1     | Western Digital Corporation     | [Thomas Wicki](mailto:[email protected])                 | 11                | https://github.com/chipsalliance/Cores-SweRV
 MSCC          | Rongcui Dong                    | [Rongcui Dong](mailto:[email protected])                | 12 | https://github.com/rongcuid/MSCC
-BlackParrot   | The World                       | [Michael B. Taylor](mailto:[email protected]), U. Washington | 13 |  https://github.com/black-parrot 
-BaseJump Manycore   | U. Washington             | [Michael B. Taylor](mailto:[email protected]), U. Washington | 14 |  https://github.com/bespoke-silicon-group/bsg_manycore 
+BlackParrot   | The World                       | [Michael B. Taylor](mailto:[email protected]), U. Washington | 13 |  https://github.com/black-parrot
+BaseJump Manycore   | U. Washington             | [Michael B. Taylor](mailto:[email protected]), U. Washington | 14 |  https://github.com/bespoke-silicon-group/bsg_manycore
 C-Class       | IIT Madras                      | [Neel Gala](mailto:[email protected])                      | 15                 | https://gitlab.com/shaktiproject/cores/c-class
 SweRV EL2     | Western Digital Corporation     | [Thomas Wicki](mailto:[email protected])                 | 16                | https://github.com/chipsalliance/Cores-SweRV-EL2
 SweRV EH2     | Western Digital Corporation     | [Thomas Wicki](mailto:[email protected])                 | 17                | https://github.com/chipsalliance/Cores-SweRV-EH2