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| 1 | +==== SFENCE_VMA |
| 2 | + |
| 3 | +Synopsis:: |
| 4 | + |
| 5 | +Mnemonic:: |
| 6 | ++ |
| 7 | +`sfence_vma rs1, rs2` |
| 8 | ++ |
| 9 | + |
| 10 | +Encoding:: |
| 11 | +[wavedrom, , svg] |
| 12 | +.... |
| 13 | +{reg:[ |
| 14 | +{bits: 15, name: 0x73}, |
| 15 | +{bits: 5, name: 'rs1'}, |
| 16 | +{bits: 5, name: 'rs2'}, |
| 17 | +{bits: 7, name: 0x9} |
| 18 | +]} |
| 19 | +.... |
| 20 | + |
| 21 | +Description:: |
| 22 | + |
| 23 | +Arguments:: |
| 24 | +[%autowidth] |
| 25 | +[%header,cols="4,2,2"] |
| 26 | +|=== |
| 27 | +|Register |Direction |Definition |
| 28 | +|rs1 |input |Source register 1 |
| 29 | +|rs2 |input |Source register 2 |
| 30 | +|=== |
| 31 | + |
| 32 | +Sail Code:: |
| 33 | + |
| 34 | +[source,sail] |
| 35 | +-- |
| 36 | +function clause execute SFENCE_VMA(rs1, rs2) = { |
| 37 | + let addr : option(xlenbits) = if rs1 == 0b00000 then None() else Some(X(rs1)); |
| 38 | + let asid : option(xlenbits) = if rs2 == 0b00000 then None() else Some(X(rs2)); |
| 39 | + match cur_privilege { |
| 40 | + User => { handle_illegal(); RETIRE_FAIL }, |
| 41 | + Supervisor => match (architecture(get_mstatus_SXL(mstatus)), mstatus[TVM]) { |
| 42 | + (Some(_), 0b1) => { handle_illegal(); RETIRE_FAIL }, |
| 43 | + (Some(_), 0b0) => { flush_TLB(asid, addr); RETIRE_SUCCESS }, |
| 44 | + (_, _) => internal_error(__FILE__, __LINE__, "unimplemented sfence architecture") |
| 45 | + }, |
| 46 | + Machine => { flush_TLB(asid, addr); RETIRE_SUCCESS } |
| 47 | + } |
| 48 | +} |
| 49 | +-- |
| 50 | + |
| 51 | +Included in:: RV(32/64)S |
| 52 | + |
| 53 | +<<< |
| 54 | + |
| 55 | +==== SRET |
| 56 | + |
| 57 | +Synopsis:: |
| 58 | + |
| 59 | +Mnemonic:: |
| 60 | ++ |
| 61 | +`sret` |
| 62 | ++ |
| 63 | + |
| 64 | +Encoding:: |
| 65 | +[wavedrom, , svg] |
| 66 | +.... |
| 67 | +{reg:[ |
| 68 | +{bits: 32, name: 0x10200073} |
| 69 | +]} |
| 70 | +.... |
| 71 | + |
| 72 | +Description:: |
| 73 | + |
| 74 | +Arguments:: |
| 75 | +[%autowidth] |
| 76 | +[%header,cols="4,2,2"] |
| 77 | +|=== |
| 78 | +|Register |Direction |Definition |
| 79 | +|=== |
| 80 | + |
| 81 | +Sail Code:: |
| 82 | + |
| 83 | +[source,sail] |
| 84 | +-- |
| 85 | +function clause execute SRET() = { |
| 86 | + let sret_illegal : bool = match cur_privilege { |
| 87 | + User => true, |
| 88 | + Supervisor => not(haveSupMode ()) | mstatus[TSR] == 0b1, |
| 89 | + Machine => not(haveSupMode ()) |
| 90 | + }; |
| 91 | + if sret_illegal |
| 92 | + then { handle_illegal(); RETIRE_FAIL } |
| 93 | + else if not(ext_check_xret_priv (Supervisor)) |
| 94 | + then { ext_fail_xret_priv(); RETIRE_FAIL } |
| 95 | + else { |
| 96 | + set_next_pc(exception_handler(cur_privilege, CTL_SRET(), PC)); |
| 97 | + RETIRE_SUCCESS |
| 98 | + } |
| 99 | +} |
| 100 | +-- |
| 101 | + |
| 102 | +Included in:: RV(32/64)S |
| 103 | + |
| 104 | +<<< |
| 105 | + |
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