Skip to content

Commit bc7c143

Browse files
AFOliveiraAFOliveira
committed
Added Description generation
Signed-off-by: Afonso Oliveira <[email protected]>
1 parent 5b43c3e commit bc7c143

File tree

4 files changed

+110
-43
lines changed

4 files changed

+110
-43
lines changed

‎instr-encoding-privileged.adoc‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ Encoding::
1818
]}
1919
....
2020

21-
Description::
21+
Description:: No description available.
2222

2323
Arguments::
2424
[%autowidth]
@@ -69,7 +69,7 @@ Encoding::
6969
]}
7070
....
7171

72-
Description::
72+
Description:: No description available.
7373

7474
Arguments::
7575
[%autowidth]

‎instr-encoding-unprivileged.adoc‎

Lines changed: 37 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ Encoding::
2020
]}
2121
....
2222

23-
Description::
23+
Description:: Adds rs1 and rs2, stores the result in rd
2424

2525
Arguments::
2626
[%autowidth]
@@ -70,7 +70,7 @@ Encoding::
7070
]}
7171
....
7272

73-
Description::
73+
Description:: Adds the sign-extended 12-bit immediate to rs1 and stores the result in rd
7474

7575
Arguments::
7676
[%autowidth]
@@ -121,7 +121,7 @@ Encoding::
121121
]}
122122
....
123123

124-
Description::
124+
Description:: Performs bitwise AND on rs1 and rs2, stores the result in rd
125125

126126
Arguments::
127127
[%autowidth]
@@ -171,7 +171,7 @@ Encoding::
171171
]}
172172
....
173173

174-
Description::
174+
Description:: Performs bitwise AND on rs1 and the sign-extended 12-bit immediate, stores the result in rd
175175

176176
Arguments::
177177
[%autowidth]
@@ -219,7 +219,7 @@ Encoding::
219219
]}
220220
....
221221

222-
Description::
222+
Description:: Forms a 32-bit offset from the 20-bit U-immediate, fills the lowest 12 bits with zeros, adds this offset to the PC, and places the result in register rd
223223

224224
Arguments::
225225
[%autowidth]
@@ -270,7 +270,7 @@ Encoding::
270270
]}
271271
....
272272

273-
Description::
273+
Description:: Compares rs1 and rs2, and if equal, branches to the PC-relative address formed by adding the sign-extended 12-bit immediate to the PC
274274

275275
Arguments::
276276
[%autowidth]
@@ -341,7 +341,7 @@ Encoding::
341341
]}
342342
....
343343

344-
Description::
344+
Description:: Compares rs1 and rs2 as signed integers, and if rs1 >= rs2, branches to the PC-relative address formed by adding the sign-extended 12-bit immediate to the PC
345345

346346
Arguments::
347347
[%autowidth]
@@ -412,7 +412,7 @@ Encoding::
412412
]}
413413
....
414414

415-
Description::
415+
Description:: Compares rs1 and rs2 as unsigned integers, and if rs1 >= rs2, branches to the PC-relative address formed by adding the sign-extended 12-bit immediate to the PC
416416

417417
Arguments::
418418
[%autowidth]
@@ -483,7 +483,7 @@ Encoding::
483483
]}
484484
....
485485

486-
Description::
486+
Description:: Compares rs1 and rs2 as signed integers, and if rs1 < rs2, branches to the PC-relative address formed by adding the sign-extended 12-bit immediate to the PC
487487

488488
Arguments::
489489
[%autowidth]
@@ -554,7 +554,7 @@ Encoding::
554554
]}
555555
....
556556

557-
Description::
557+
Description:: Compares rs1 and rs2 as unsigned integers, and if rs1 < rs2, branches to the PC-relative address formed by adding the sign-extended 12-bit immediate to the PC
558558

559559
Arguments::
560560
[%autowidth]
@@ -625,7 +625,7 @@ Encoding::
625625
]}
626626
....
627627

628-
Description::
628+
Description:: Compares rs1 and rs2, and if not equal, branches to the PC-relative address formed by adding the sign-extended 12-bit immediate to the PC
629629

630630
Arguments::
631631
[%autowidth]
@@ -689,7 +689,7 @@ Encoding::
689689
]}
690690
....
691691

692-
Description::
692+
Description:: No description available.
693693

694694
Arguments::
695695
[%autowidth]
@@ -729,7 +729,7 @@ Encoding::
729729
]}
730730
....
731731

732-
Description::
732+
Description:: No description available.
733733

734734
Arguments::
735735
[%autowidth]
@@ -783,7 +783,7 @@ Encoding::
783783
]}
784784
....
785785

786-
Description::
786+
Description:: Enforces ordering between memory operations and I/O from different RISC-V harts
787787

788788
Arguments::
789789
[%autowidth]
@@ -851,7 +851,7 @@ Encoding::
851851
]}
852852
....
853853

854-
Description::
854+
Description:: Jumps to an offset formed by adding the sign-extended 20-bit immediate to the PC, and saves PC+4 to register rd
855855

856856
Arguments::
857857
[%autowidth]
@@ -915,7 +915,7 @@ Encoding::
915915
]}
916916
....
917917

918-
Description::
918+
Description:: Jumps to the address formed by adding the sign-extended 12-bit immediate to register rs1, and saves PC+4 to register rd
919919

920920
Arguments::
921921
[%autowidth]
@@ -956,7 +956,7 @@ Encoding::
956956
]}
957957
....
958958

959-
Description::
959+
Description:: Loads an 8-bit value from memory, sign-extends it to 32 bits, and writes it to rd
960960

961961
Arguments::
962962
[%autowidth]
@@ -997,7 +997,7 @@ Encoding::
997997
]}
998998
....
999999

1000-
Description::
1000+
Description:: Loads an 8-bit value from memory, zero-extends it to 32 bits, and writes it to rd
10011001

10021002
Arguments::
10031003
[%autowidth]
@@ -1038,7 +1038,7 @@ Encoding::
10381038
]}
10391039
....
10401040

1041-
Description::
1041+
Description:: Loads a 16-bit value from memory, sign-extends it to 32 bits, and writes it to rd
10421042

10431043
Arguments::
10441044
[%autowidth]
@@ -1079,7 +1079,7 @@ Encoding::
10791079
]}
10801080
....
10811081

1082-
Description::
1082+
Description:: Loads a 16-bit value from memory, zero-extends it to 32 bits, and writes it to rd
10831083

10841084
Arguments::
10851085
[%autowidth]
@@ -1118,7 +1118,7 @@ Encoding::
11181118
]}
11191119
....
11201120

1121-
Description::
1121+
Description:: Loads a 20-bit immediate into bits 31-12 of the destination register, setting bits 11-0 to zero
11221122

11231123
Arguments::
11241124
[%autowidth]
@@ -1166,7 +1166,7 @@ Encoding::
11661166
]}
11671167
....
11681168

1169-
Description::
1169+
Description:: Loads a 32-bit value from memory and writes it to rd
11701170

11711171
Arguments::
11721172
[%autowidth]
@@ -1208,7 +1208,7 @@ Encoding::
12081208
]}
12091209
....
12101210

1211-
Description::
1211+
Description:: Performs bitwise OR on rs1 and rs2, stores the result in rd
12121212

12131213
Arguments::
12141214
[%autowidth]
@@ -1258,7 +1258,7 @@ Encoding::
12581258
]}
12591259
....
12601260

1261-
Description::
1261+
Description:: Performs bitwise OR on rs1 and the sign-extended 12-bit immediate, stores the result in rd
12621262

12631263
Arguments::
12641264
[%autowidth]
@@ -1309,7 +1309,7 @@ Encoding::
13091309
]}
13101310
....
13111311

1312-
Description::
1312+
Description:: Stores the lowest 8 bits from rs2 to memory at the address in rs1 plus the sign-extended 12-bit immediate
13131313

13141314
Arguments::
13151315
[%autowidth]
@@ -1350,7 +1350,7 @@ Encoding::
13501350
]}
13511351
....
13521352

1353-
Description::
1353+
Description:: Stores the lowest 16 bits from rs2 to memory at the address in rs1 plus the sign-extended 12-bit immediate
13541354

13551355
Arguments::
13561356
[%autowidth]
@@ -1391,7 +1391,7 @@ Encoding::
13911391
]}
13921392
....
13931393

1394-
Description::
1394+
Description:: Shifts rs1 left by the amount specified in the lower 5 bits of rs2, stores the result in rd
13951395

13961396
Arguments::
13971397
[%autowidth]
@@ -1444,7 +1444,7 @@ Encoding::
14441444
]}
14451445
....
14461446

1447-
Description::
1447+
Description:: Compares rs1 and rs2 as signed integers, sets rd to 1 if rs1 < rs2, 0 otherwise
14481448

14491449
Arguments::
14501450
[%autowidth]
@@ -1495,7 +1495,7 @@ Encoding::
14951495
]}
14961496
....
14971497

1498-
Description::
1498+
Description:: Compares rs1 with the sign-extended 12-bit immediate as signed integers, sets rd to 1 if rs1 < immediate, 0 otherwise
14991499

15001500
Arguments::
15011501
[%autowidth]
@@ -1546,7 +1546,7 @@ Encoding::
15461546
]}
15471547
....
15481548

1549-
Description::
1549+
Description:: Compares rs1 with the sign-extended 12-bit immediate as unsigned integers, sets rd to 1 if rs1 < immediate, 0 otherwise
15501550

15511551
Arguments::
15521552
[%autowidth]
@@ -1597,7 +1597,7 @@ Encoding::
15971597
]}
15981598
....
15991599

1600-
Description::
1600+
Description:: Compares rs1 and rs2 as unsigned integers, sets rd to 1 if rs1 < rs2, 0 otherwise
16011601

16021602
Arguments::
16031603
[%autowidth]
@@ -1648,7 +1648,7 @@ Encoding::
16481648
]}
16491649
....
16501650

1651-
Description::
1651+
Description:: Shifts rs1 right by the amount specified in the lower 5 bits of rs2, filling with the sign bit, stores the result in rd
16521652

16531653
Arguments::
16541654
[%autowidth]
@@ -1701,7 +1701,7 @@ Encoding::
17011701
]}
17021702
....
17031703

1704-
Description::
1704+
Description:: Shifts rs1 right by the amount specified in the lower 5 bits of rs2, filling with zeros, stores the result in rd
17051705

17061706
Arguments::
17071707
[%autowidth]
@@ -1754,7 +1754,7 @@ Encoding::
17541754
]}
17551755
....
17561756

1757-
Description::
1757+
Description:: Subtracts rs2 from rs1, stores the result in rd
17581758

17591759
Arguments::
17601760
[%autowidth]
@@ -1805,7 +1805,7 @@ Encoding::
18051805
]}
18061806
....
18071807

1808-
Description::
1808+
Description:: Stores the 32 bits from rs2 to memory at the address in rs1 plus the sign-extended 12-bit immediate
18091809

18101810
Arguments::
18111811
[%autowidth]
@@ -1846,7 +1846,7 @@ Encoding::
18461846
]}
18471847
....
18481848

1849-
Description::
1849+
Description:: Performs bitwise XOR on rs1 and rs2, stores the result in rd
18501850

18511851
Arguments::
18521852
[%autowidth]
@@ -1896,7 +1896,7 @@ Encoding::
18961896
]}
18971897
....
18981898

1899-
Description::
1899+
Description:: Performs bitwise XOR on rs1 and the sign-extended 12-bit immediate, stores the result in rd
19001900

19011901
Arguments::
19021902
[%autowidth]

0 commit comments

Comments
 (0)