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Merge branch 'development' of https://github.com/foss-for-synopsys-dwc-arc-processors/synopsys-caffe into development
add transform_mode: pytorch_half_pixel to ResizeBilinear layer
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‎FEATURES.md‎

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@@ -27,6 +27,7 @@ gru_layer
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hard_sigmoid_layer
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hard_swish_layer
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hard_tanh_layer
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icnet_subgraph_layer
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log_softmax_layer
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lp_normalization_layer
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luong_attention_layer

‎include/caffe/layers/icnet_subgraph_layer.hpp‎

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#ifndef CAFFE_ICNET_SUBGRAPH_LAYER_HPP_
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#define CAFFE_ICNET_SUBGRAPH_LAYER_HPP_
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#include <vector>
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#include "caffe/blob.hpp"
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#include "caffe/layer.hpp"
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#include "caffe/proto/caffe.pb.h"
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namespace caffe {
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/**
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* @brief Merge the AVE Pooling, Interp and Eltwise sum for host_fixed usage in ICNet model.
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*
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* NOTE: does not implement Backwards operation.
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*/
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template <typename Dtype>
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class ICNetSubgraphLayer : public Layer<Dtype> {
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public:
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explicit ICNetSubgraphLayer(const LayerParameter& param)
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: Layer<Dtype>(param) {}
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virtual void LayerSetUp(const vector<Blob<Dtype>*>& bottom,
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const vector<Blob<Dtype>*>& top);
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virtual void Reshape(const vector<Blob<Dtype>*>& bottom,
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const vector<Blob<Dtype>*>& top);
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virtual inline const char* type() const { return "ICNetSubgraph"; }
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virtual inline int ExactNumBottomBlobs() const { return 1; }
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virtual inline int ExactNumTopBlobs() const { return 1; }
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protected:
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virtual void Forward_cpu(const vector<Blob<Dtype>*>& bottom,
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const vector<Blob<Dtype>*>& top);
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virtual void Backward_cpu(const vector<Blob<Dtype>*>& top,
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const vector<bool>& propagate_down, const vector<Blob<Dtype>*>& bottom){
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NOT_IMPLEMENTED;
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}
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int pad_h_ = 0;
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int pad_w_ = 0;
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int num_;
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int channels_;
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int height_, width_;
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vector<int> kernel_h_;
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vector<int> kernel_w_;
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vector<int> stride_h_;
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vector<int> stride_w_;
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vector<int> pooled_height_;
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vector<int> pooled_width_;
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int pool_branches_ = 4;
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Blob<Dtype> pooling_;
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Blob<Dtype> interp_;
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};
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} // namespace caffe
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#endif // CAFFE_ICNET_SUBGRAPH_LAYER_HPP_

‎src/caffe/layers/icnet_subgraph_layer.cpp‎

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#include <algorithm>
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#include <cfloat>
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#include <vector>
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#include "caffe/layers/icnet_subgraph_layer.hpp"
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#include "caffe/util/math_functions.hpp"
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#include "caffe/util/interp.hpp"
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namespace caffe {
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using std::min;
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using std::max;
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template <typename Dtype>
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void ICNetSubgraphLayer<Dtype>::LayerSetUp(const vector<Blob<Dtype>*>& bottom,
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const vector<Blob<Dtype>*>& top) {
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// the parameter is taken from icnet_cityscapes.prototxt layer conv5_3 to conv5_3_sum subgraph
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kernel_h_.push_back(33);
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kernel_h_.push_back(17);
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kernel_h_.push_back(13);
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kernel_h_.push_back(8);
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kernel_w_.push_back(65);
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kernel_w_.push_back(33);
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kernel_w_.push_back(25);
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kernel_w_.push_back(15);
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stride_h_.push_back(33);
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stride_h_.push_back(16);
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stride_h_.push_back(10);
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stride_h_.push_back(5);
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stride_w_.push_back(65);
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stride_w_.push_back(32);
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stride_w_.push_back(20);
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stride_w_.push_back(10);
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}
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template <typename Dtype>
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void ICNetSubgraphLayer<Dtype>::Reshape(const vector<Blob<Dtype>*>& bottom,
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const vector<Blob<Dtype>*>& top) {
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CHECK_EQ(4, bottom[0]->num_axes()) << "Input must have 4 axes, "
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<< "corresponding to (num, channels, height, width)";
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num_ = bottom[0]->num();
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channels_ = bottom[0]->channels();
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height_ = bottom[0]->height();
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width_ = bottom[0]->width();
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for (int i = 0; i < pool_branches_; i++)
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{
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pooled_height_.push_back(static_cast<int>(ceil(static_cast<float>(
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height_ + 2 * pad_h_ - kernel_h_[i]) / stride_h_[i])) + 1);
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pooled_width_.push_back(static_cast<int>(ceil(static_cast<float>(
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width_ + 2 * pad_w_ - kernel_w_[i]) / stride_w_[i])) + 1);
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}
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top[0]->ReshapeLike(*bottom[0]);
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// allocate for the largest size needed
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pooling_.Reshape(num_, channels_, pooled_height_[pool_branches_-1],
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pooled_width_[pool_branches_-1]);
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interp_.ReshapeLike(*bottom[0]);
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}
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template <typename Dtype>
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void ICNetSubgraphLayer<Dtype>::Forward_cpu(const vector<Blob<Dtype>*>& bottom,
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const vector<Blob<Dtype>*>& top) {
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const Dtype* bottom_data = bottom[0]->cpu_data();
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Dtype* top_data = top[0]->mutable_cpu_data();
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const int top_count = top[0]->count();
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// 1 branch data directly copied to final accumulator
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for (int i = 0; i < top_count; ++i) {
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top_data[i] = bottom_data[i];
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}
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int pad_top = 0, pad_bottom = 0, pad_left = 0, pad_right = 0;
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// The main loop
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for (int i = 0; i < pool_branches_; i++)
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{
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bottom_data = bottom[0]->cpu_data(); // reset the pointer
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// do the ave pooling
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Dtype* pool_data = pooling_.mutable_cpu_data();
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int pool_count = pooling_.count();
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for (int j = 0; j < pool_count; ++j) {
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pool_data[j] = 0; // clear the field
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}
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for (int n = 0; n < num_; ++n) {
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for (int c = 0; c < channels_; ++c) {
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for (int ph = 0; ph < pooled_height_[i]; ++ph) {
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for (int pw = 0; pw < pooled_width_[i]; ++pw) {
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int hstart = ph * stride_h_[i] - pad_top;
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int wstart = pw * stride_w_[i] - pad_left;
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int hend = min(hstart + kernel_h_[i], height_ + pad_bottom);
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int wend = min(wstart + kernel_w_[i], width_ + pad_right);
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int pool_size = (hend - hstart) * (wend - wstart);
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hstart = max(hstart, 0);
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wstart = max(wstart, 0);
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hend = min(hend, height_);
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wend = min(wend, width_);
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for (int h = hstart; h < hend; ++h) {
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for (int w = wstart; w < wend; ++w) {
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pool_data[ph * pooled_width_[i] + pw] +=
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bottom_data[h * width_ + w];
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}
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}
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pool_data[ph * pooled_width_[i] + pw] /= pool_size;
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}
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}
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// compute offset
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bottom_data += bottom[0]->offset(0, 1);
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pool_data += pooled_height_[i] * pooled_width_[i];
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}
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}
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// do the interp computation
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int pad_beg_ = 0;
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int pad_end_ = 0;
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int height_in_ = pooled_height_[i];
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int width_in_ = pooled_width_[i];
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int height_in_eff_ = height_in_ + pad_beg_ + pad_end_;
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int width_in_eff_ = width_in_ + pad_beg_ + pad_end_;
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Dtype* interp_data = interp_.mutable_cpu_data();
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int interp_count = interp_.count();
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for (int j = 0; j < interp_count; ++j) {
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interp_data[j] = 0; // clear the field
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}
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caffe_cpu_interp2<Dtype,false>(num_ * channels_,
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pooling_.cpu_data(), - pad_beg_, - pad_beg_, height_in_eff_, width_in_eff_, height_in_, width_in_,
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interp_.mutable_cpu_data(), 0, 0, height_, width_, height_, width_);
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// accumulate
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for (int j = 0; j < top_count; ++j) {
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top_data[j] += interp_data[j];
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}
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}
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}
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INSTANTIATE_CLASS(ICNetSubgraphLayer);
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REGISTER_LAYER_CLASS(ICNetSubgraph);
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} // namespace caffe

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